From: Jiansong Chen Date: Mon, 10 Feb 2020 09:00:28 +0000 (+0800) Subject: drm/amdgpu/soc15: add support for navy_flounder X-Git-Tag: v5.10.7~1332^2~30^2~456 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=543aa2595c238aab6966366bd236b2beb5088d5e;p=platform%2Fkernel%2Flinux-rpi.git drm/amdgpu/soc15: add support for navy_flounder Add soc support. Signed-off-by: Jiansong Chen Reviewed-by: Tao Zhou Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index a2ab80e..665fb4c 100644 --- a/drivers/gpu/drm/amd/amdgpu/nv.c +++ b/drivers/gpu/drm/amd/amdgpu/nv.c @@ -754,6 +754,12 @@ static int nv_common_early_init(void *handle) } adev->external_rev_id = adev->rev_id + 0x28; break; + case CHIP_NAVY_FLOUNDER: + adev->cg_flags = 0; + adev->pg_flags = 0; + adev->external_rev_id = adev->rev_id + 0x32; + break; + default: /* FIXME: not supported yet */ return -EINVAL; @@ -980,6 +986,7 @@ static int nv_common_set_clockgating_state(void *handle, case CHIP_NAVI14: case CHIP_NAVI12: case CHIP_SIENNA_CICHLID: + case CHIP_NAVY_FLOUNDER: adev->nbio.funcs->update_medium_grain_clock_gating(adev, state == AMD_CG_STATE_GATE); adev->nbio.funcs->update_medium_grain_light_sleep(adev,