From: Thomas Zimmermann Date: Wed, 12 Aug 2020 17:17:18 +0000 (+0200) Subject: Merge drm/drm-next into drm-misc-next X-Git-Tag: v5.15~303^2~28^2~2119 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=534b1f9071d95325044c21d47d9f63a45cdf425e;p=platform%2Fkernel%2Flinux-starfive.git Merge drm/drm-next into drm-misc-next Backmerging drm-next into drm-misc-next for nouveau and panel updates. Resolves a conflict between ttm and nouveau, where struct ttm_mem_res got renamed to struct ttm_resource. Signed-off-by: Thomas Zimmermann --- 534b1f9071d95325044c21d47d9f63a45cdf425e diff --cc drivers/gpu/drm/nouveau/nouveau_bo.c index 29d7d7e,7806278..5392e5f --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@@ -664,363 -724,9 +664,9 @@@ nouveau_bo_evict_flags(struct ttm_buffe *pl = nvbo->placement; } - - static int - nve0_bo_move_init(struct nouveau_channel *chan, u32 handle) - { - int ret = RING_SPACE(chan, 2); - if (ret == 0) { - BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1); - OUT_RING (chan, handle & 0x0000ffff); - FIRE_RING (chan); - } - return ret; - } - - static int - nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - int ret = RING_SPACE(chan, 10); - if (ret == 0) { - BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8); - OUT_RING (chan, upper_32_bits(mem->vma[0].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[0].addr)); - OUT_RING (chan, upper_32_bits(mem->vma[1].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[1].addr)); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, new_reg->num_pages); - BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386); - } - return ret; - } - - static int - nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle) - { - int ret = RING_SPACE(chan, 2); - if (ret == 0) { - BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1); - OUT_RING (chan, handle); - } - return ret; - } - - static int - nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - u64 src_offset = mem->vma[0].addr; - u64 dst_offset = mem->vma[1].addr; - u32 page_count = new_reg->num_pages; - int ret; - - page_count = new_reg->num_pages; - while (page_count) { - int line_count = (page_count > 8191) ? 8191 : page_count; - - ret = RING_SPACE(chan, 11); - if (ret) - return ret; - - BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8); - OUT_RING (chan, upper_32_bits(src_offset)); - OUT_RING (chan, lower_32_bits(src_offset)); - OUT_RING (chan, upper_32_bits(dst_offset)); - OUT_RING (chan, lower_32_bits(dst_offset)); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, line_count); - BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1); - OUT_RING (chan, 0x00000110); - - page_count -= line_count; - src_offset += (PAGE_SIZE * line_count); - dst_offset += (PAGE_SIZE * line_count); - } - - return 0; - } - - static int - nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - u64 src_offset = mem->vma[0].addr; - u64 dst_offset = mem->vma[1].addr; - u32 page_count = new_reg->num_pages; - int ret; - - page_count = new_reg->num_pages; - while (page_count) { - int line_count = (page_count > 2047) ? 2047 : page_count; - - ret = RING_SPACE(chan, 12); - if (ret) - return ret; - - BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2); - OUT_RING (chan, upper_32_bits(dst_offset)); - OUT_RING (chan, lower_32_bits(dst_offset)); - BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6); - OUT_RING (chan, upper_32_bits(src_offset)); - OUT_RING (chan, lower_32_bits(src_offset)); - OUT_RING (chan, PAGE_SIZE); /* src_pitch */ - OUT_RING (chan, PAGE_SIZE); /* dst_pitch */ - OUT_RING (chan, PAGE_SIZE); /* line_length */ - OUT_RING (chan, line_count); - BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1); - OUT_RING (chan, 0x00100110); - - page_count -= line_count; - src_offset += (PAGE_SIZE * line_count); - dst_offset += (PAGE_SIZE * line_count); - } - - return 0; - } - - static int - nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - u64 src_offset = mem->vma[0].addr; - u64 dst_offset = mem->vma[1].addr; - u32 page_count = new_reg->num_pages; - int ret; - - page_count = new_reg->num_pages; - while (page_count) { - int line_count = (page_count > 8191) ? 8191 : page_count; - - ret = RING_SPACE(chan, 11); - if (ret) - return ret; - - BEGIN_NV04(chan, NvSubCopy, 0x030c, 8); - OUT_RING (chan, upper_32_bits(src_offset)); - OUT_RING (chan, lower_32_bits(src_offset)); - OUT_RING (chan, upper_32_bits(dst_offset)); - OUT_RING (chan, lower_32_bits(dst_offset)); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, PAGE_SIZE); - OUT_RING (chan, line_count); - BEGIN_NV04(chan, NvSubCopy, 0x0300, 1); - OUT_RING (chan, 0x00000110); - - page_count -= line_count; - src_offset += (PAGE_SIZE * line_count); - dst_offset += (PAGE_SIZE * line_count); - } - - return 0; - } - - static int - nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - int ret = RING_SPACE(chan, 7); - if (ret == 0) { - BEGIN_NV04(chan, NvSubCopy, 0x0320, 6); - OUT_RING (chan, upper_32_bits(mem->vma[0].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[0].addr)); - OUT_RING (chan, upper_32_bits(mem->vma[1].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[1].addr)); - OUT_RING (chan, 0x00000000 /* COPY */); - OUT_RING (chan, new_reg->num_pages << PAGE_SHIFT); - } - return ret; - } - - static int - nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - int ret = RING_SPACE(chan, 7); - if (ret == 0) { - BEGIN_NV04(chan, NvSubCopy, 0x0304, 6); - OUT_RING (chan, new_reg->num_pages << PAGE_SHIFT); - OUT_RING (chan, upper_32_bits(mem->vma[0].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[0].addr)); - OUT_RING (chan, upper_32_bits(mem->vma[1].addr)); - OUT_RING (chan, lower_32_bits(mem->vma[1].addr)); - OUT_RING (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */); - } - return ret; - } - - static int - nv50_bo_move_init(struct nouveau_channel *chan, u32 handle) - { - int ret = RING_SPACE(chan, 6); - if (ret == 0) { - BEGIN_NV04(chan, NvSubCopy, 0x0000, 1); - OUT_RING (chan, handle); - BEGIN_NV04(chan, NvSubCopy, 0x0180, 3); - OUT_RING (chan, chan->drm->ntfy.handle); - OUT_RING (chan, chan->vram.handle); - OUT_RING (chan, chan->vram.handle); - } - - return ret; - } - - static int - nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - struct nouveau_mem *mem = nouveau_mem(old_reg); - u64 length = (new_reg->num_pages << PAGE_SHIFT); - u64 src_offset = mem->vma[0].addr; - u64 dst_offset = mem->vma[1].addr; - int src_tiled = !!mem->kind; - int dst_tiled = !!nouveau_mem(new_reg)->kind; - int ret; - - while (length) { - u32 amount, stride, height; - - ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled)); - if (ret) - return ret; - - amount = min(length, (u64)(4 * 1024 * 1024)); - stride = 16 * 4; - height = amount / stride; - - if (src_tiled) { - BEGIN_NV04(chan, NvSubCopy, 0x0200, 7); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, stride); - OUT_RING (chan, height); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - } else { - BEGIN_NV04(chan, NvSubCopy, 0x0200, 1); - OUT_RING (chan, 1); - } - if (dst_tiled) { - BEGIN_NV04(chan, NvSubCopy, 0x021c, 7); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, stride); - OUT_RING (chan, height); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - } else { - BEGIN_NV04(chan, NvSubCopy, 0x021c, 1); - OUT_RING (chan, 1); - } - - BEGIN_NV04(chan, NvSubCopy, 0x0238, 2); - OUT_RING (chan, upper_32_bits(src_offset)); - OUT_RING (chan, upper_32_bits(dst_offset)); - BEGIN_NV04(chan, NvSubCopy, 0x030c, 8); - OUT_RING (chan, lower_32_bits(src_offset)); - OUT_RING (chan, lower_32_bits(dst_offset)); - OUT_RING (chan, stride); - OUT_RING (chan, stride); - OUT_RING (chan, stride); - OUT_RING (chan, height); - OUT_RING (chan, 0x00000101); - OUT_RING (chan, 0x00000000); - BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1); - OUT_RING (chan, 0); - - length -= amount; - src_offset += amount; - dst_offset += amount; - } - - return 0; - } - - static int - nv04_bo_move_init(struct nouveau_channel *chan, u32 handle) - { - int ret = RING_SPACE(chan, 4); - if (ret == 0) { - BEGIN_NV04(chan, NvSubCopy, 0x0000, 1); - OUT_RING (chan, handle); - BEGIN_NV04(chan, NvSubCopy, 0x0180, 1); - OUT_RING (chan, chan->drm->ntfy.handle); - } - - return ret; - } - - static inline uint32_t - nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo, - struct nouveau_channel *chan, struct ttm_resource *reg) - { - if (reg->mem_type == TTM_PL_TT) - return NvDmaTT; - return chan->vram.handle; - } - - static int - nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_resource *old_reg, struct ttm_resource *new_reg) - { - u32 src_offset = old_reg->start << PAGE_SHIFT; - u32 dst_offset = new_reg->start << PAGE_SHIFT; - u32 page_count = new_reg->num_pages; - int ret; - - ret = RING_SPACE(chan, 3); - if (ret) - return ret; - - BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2); - OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_reg)); - OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_reg)); - - page_count = new_reg->num_pages; - while (page_count) { - int line_count = (page_count > 2047) ? 2047 : page_count; - - ret = RING_SPACE(chan, 11); - if (ret) - return ret; - - BEGIN_NV04(chan, NvSubCopy, - NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); - OUT_RING (chan, src_offset); - OUT_RING (chan, dst_offset); - OUT_RING (chan, PAGE_SIZE); /* src_pitch */ - OUT_RING (chan, PAGE_SIZE); /* dst_pitch */ - OUT_RING (chan, PAGE_SIZE); /* line_length */ - OUT_RING (chan, line_count); - OUT_RING (chan, 0x00000101); - OUT_RING (chan, 0x00000000); - BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1); - OUT_RING (chan, 0); - - page_count -= line_count; - src_offset += (PAGE_SIZE * line_count); - dst_offset += (PAGE_SIZE * line_count); - } - - return 0; - } - static int nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo, - struct ttm_mem_reg *reg) + struct ttm_resource *reg) { struct nouveau_mem *old_mem = nouveau_mem(&bo->mem); struct nouveau_mem *new_mem = nouveau_mem(reg); diff --cc drivers/gpu/drm/nouveau/nouveau_bo.h index e944b4a,52489ce..aecb748 --- a/drivers/gpu/drm/nouveau/nouveau_bo.h +++ b/drivers/gpu/drm/nouveau/nouveau_bo.h @@@ -135,4 -136,42 +136,42 @@@ nouveau_bo_new_pin_map(struct nouveau_c } return ret; } + + int nv04_bo_move_init(struct nouveau_channel *, u32); + int nv04_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nv50_bo_move_init(struct nouveau_channel *, u32); + int nv50_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nv84_bo_move_exec(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nva3_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nvc0_bo_move_init(struct nouveau_channel *, u32); + int nvc0_bo_move_m2mf(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nvc0_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + int nve0_bo_move_init(struct nouveau_channel *, u32); + int nve0_bo_move_copy(struct nouveau_channel *, struct ttm_buffer_object *, - struct ttm_mem_reg *, struct ttm_mem_reg *); ++ struct ttm_resource *, struct ttm_resource *); + + #define NVBO_WR32_(b,o,dr,f) nouveau_bo_wr32((b), (o)/4 + (dr), (f)) + #define NVBO_RD32_(b,o,dr) nouveau_bo_rd32((b), (o)/4 + (dr)) + #define NVBO_RD32(A...) DRF_RD(NVBO_RD32_, ##A) + #define NVBO_RV32(A...) DRF_RV(NVBO_RD32_, ##A) + #define NVBO_TV32(A...) DRF_TV(NVBO_RD32_, ##A) + #define NVBO_TD32(A...) DRF_TD(NVBO_RD32_, ##A) + #define NVBO_WR32(A...) DRF_WR( NVBO_WR32_, ##A) + #define NVBO_WV32(A...) DRF_WV( NVBO_WR32_, ##A) + #define NVBO_WD32(A...) DRF_WD( NVBO_WR32_, ##A) + #define NVBO_MR32(A...) DRF_MR(NVBO_RD32_, NVBO_WR32_, u32, ##A) + #define NVBO_MV32(A...) DRF_MV(NVBO_RD32_, NVBO_WR32_, u32, ##A) + #define NVBO_MD32(A...) DRF_MD(NVBO_RD32_, NVBO_WR32_, u32, ##A) #endif diff --cc drivers/gpu/drm/nouveau/nouveau_bo0039.c index 0000000,bf7ae2c..7390132 mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo0039.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo0039.c @@@ -1,0 -1,109 +1,109 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_drv.h" + + #include + + #include + + static inline uint32_t + nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo, - struct nouveau_channel *chan, struct ttm_mem_reg *reg) ++ struct nouveau_channel *chan, struct ttm_resource *reg) + { + if (reg->mem_type == TTM_PL_TT) + return NvDmaTT; + return chan->vram.handle; + } + + int + nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nvif_push *push = chan->chan.push; + u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg); + u32 src_offset = old_reg->start << PAGE_SHIFT; + u32 dst_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, new_reg); + u32 dst_offset = new_reg->start << PAGE_SHIFT; + u32 page_count = new_reg->num_pages; + int ret; + + ret = PUSH_WAIT(push, 3); + if (ret) + return ret; + + PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_BUFFER_IN, src_ctxdma, + SET_CONTEXT_DMA_BUFFER_OUT, dst_ctxdma); + + page_count = new_reg->num_pages; + while (page_count) { + int line_count = (page_count > 2047) ? 2047 : page_count; + + ret = PUSH_WAIT(push, 11); + if (ret) + return ret; + + PUSH_MTHD(push, NV039, OFFSET_IN, src_offset, + OFFSET_OUT, dst_offset, + PITCH_IN, PAGE_SIZE, + PITCH_OUT, PAGE_SIZE, + LINE_LENGTH_IN, PAGE_SIZE, + LINE_COUNT, line_count, + + FORMAT, + NVVAL(NV039, FORMAT, IN, 1) | + NVVAL(NV039, FORMAT, OUT, 1), + + BUFFER_NOTIFY, NV039_BUFFER_NOTIFY_WRITE_ONLY); + + PUSH_MTHD(push, NV039, NO_OPERATION, 0x00000000); + + page_count -= line_count; + src_offset += (PAGE_SIZE * line_count); + dst_offset += (PAGE_SIZE * line_count); + } + + return 0; + } + + int + nv04_bo_move_init(struct nouveau_channel *chan, u32 handle) + { + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 4); + if (ret) + return ret; + + PUSH_MTHD(push, NV039, SET_OBJECT, handle); + PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_NOTIFIES, chan->drm->ntfy.handle); + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_bo5039.c index 0000000,f9b9b85..4c75c7b mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo5039.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo5039.c @@@ -1,0 -1,151 +1,151 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_drv.h" + #include "nouveau_mem.h" + + #include + + #include + + int + nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nouveau_mem *mem = nouveau_mem(old_reg); + struct nvif_push *push = chan->chan.push; + u64 length = (new_reg->num_pages << PAGE_SHIFT); + u64 src_offset = mem->vma[0].addr; + u64 dst_offset = mem->vma[1].addr; + int src_tiled = !!mem->kind; + int dst_tiled = !!nouveau_mem(new_reg)->kind; + int ret; + + while (length) { + u32 amount, stride, height; + + ret = PUSH_WAIT(push, 18 + 6 * (src_tiled + dst_tiled)); + if (ret) + return ret; + + amount = min(length, (u64)(4 * 1024 * 1024)); + stride = 16 * 4; + height = amount / stride; + + if (src_tiled) { + PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT, + NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR), + + SET_SRC_BLOCK_SIZE, + NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) | + NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) | + NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB), + + SET_SRC_WIDTH, stride, + SET_SRC_HEIGHT, height, + SET_SRC_DEPTH, 1, + SET_SRC_LAYER, 0, + + SET_SRC_ORIGIN, + NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) | + NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0)); + } else { + PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT, + NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH)); + } + + if (dst_tiled) { + PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT, + NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR), + + SET_DST_BLOCK_SIZE, + NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) | + NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) | + NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB), + + SET_DST_WIDTH, stride, + SET_DST_HEIGHT, height, + SET_DST_DEPTH, 1, + SET_DST_LAYER, 0, + + SET_DST_ORIGIN, + NVVAL(NV5039, SET_DST_ORIGIN, X, 0) | + NVVAL(NV5039, SET_DST_ORIGIN, Y, 0)); + } else { + PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT, + NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH)); + } + + PUSH_MTHD(push, NV5039, OFFSET_IN_UPPER, + NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)), + + OFFSET_OUT_UPPER, + NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset))); + + PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset), + OFFSET_OUT, lower_32_bits(dst_offset), + PITCH_IN, stride, + PITCH_OUT, stride, + LINE_LENGTH_IN, stride, + LINE_COUNT, height, + + FORMAT, + NVDEF(NV5039, FORMAT, IN, ONE) | + NVDEF(NV5039, FORMAT, OUT, ONE), + + BUFFER_NOTIFY, + NVDEF(NV5039, BUFFER_NOTIFY, TYPE, WRITE_ONLY)); + + PUSH_MTHD(push, NV5039, NO_OPERATION, 0x00000000); + + length -= amount; + src_offset += amount; + dst_offset += amount; + } + + return 0; + } + + int + nv50_bo_move_init(struct nouveau_channel *chan, u32 handle) + { + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 6); + if (ret) + return ret; + + PUSH_MTHD(push, NV5039, SET_OBJECT, handle); + PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->drm->ntfy.handle, + SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle, + SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle); + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_bo74c1.c index 0000000,1b5fd78..ed6c09d mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo74c1.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo74c1.c @@@ -1,0 -1,54 +1,54 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_mem.h" + + #include + + int + nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nouveau_mem *mem = nouveau_mem(old_reg); + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 7); + if (ret) + return ret; + + PUSH_NVSQ(push, NV74C1, 0x0304, new_reg->num_pages << PAGE_SHIFT, + 0x0308, upper_32_bits(mem->vma[0].addr), + 0x030c, lower_32_bits(mem->vma[0].addr), + 0x0310, upper_32_bits(mem->vma[1].addr), + 0x0314, lower_32_bits(mem->vma[1].addr), + 0x0318, 0x00000000 /* MODE_COPY, QUERY_NONE */); + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_bo85b5.c index 0000000,f0df172..dec29b2 mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo85b5.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo85b5.c @@@ -1,0 -1,74 +1,74 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_mem.h" + + #include + + /*XXX: Fixup class to be compatible with NVIDIA's, which will allow sharing + * code with KeplerDmaCopyA. + */ + + int + nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nouveau_mem *mem = nouveau_mem(old_reg); + struct nvif_push *push = chan->chan.push; + u64 src_offset = mem->vma[0].addr; + u64 dst_offset = mem->vma[1].addr; + u32 page_count = new_reg->num_pages; + int ret; + + page_count = new_reg->num_pages; + while (page_count) { + int line_count = (page_count > 8191) ? 8191 : page_count; + + ret = PUSH_WAIT(push, 11); + if (ret) + return ret; + + PUSH_NVSQ(push, NV85B5, 0x030c, upper_32_bits(src_offset), + 0x0310, lower_32_bits(src_offset), + 0x0314, upper_32_bits(dst_offset), + 0x0318, lower_32_bits(dst_offset), + 0x031c, PAGE_SIZE, + 0x0320, PAGE_SIZE, + 0x0324, PAGE_SIZE, + 0x0328, line_count); + PUSH_NVSQ(push, NV85B5, 0x0300, 0x00000110); + + page_count -= line_count; + src_offset += (PAGE_SIZE * line_count); + dst_offset += (PAGE_SIZE * line_count); + } + + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_bo9039.c index 0000000,52fefb3..776b049 mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo9039.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo9039.c @@@ -1,0 -1,98 +1,98 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_mem.h" + + #include + + #include + + int + nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nvif_push *push = chan->chan.push; + struct nouveau_mem *mem = nouveau_mem(old_reg); + u64 src_offset = mem->vma[0].addr; + u64 dst_offset = mem->vma[1].addr; + u32 page_count = new_reg->num_pages; + int ret; + + page_count = new_reg->num_pages; + while (page_count) { + int line_count = (page_count > 2047) ? 2047 : page_count; + + ret = PUSH_WAIT(push, 12); + if (ret) + return ret; + + PUSH_MTHD(push, NV9039, OFFSET_OUT_UPPER, + NVVAL(NV9039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)), + + OFFSET_OUT, lower_32_bits(dst_offset)); + + PUSH_MTHD(push, NV9039, OFFSET_IN_UPPER, + NVVAL(NV9039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)), + + OFFSET_IN, lower_32_bits(src_offset), + PITCH_IN, PAGE_SIZE, + PITCH_OUT, PAGE_SIZE, + LINE_LENGTH_IN, PAGE_SIZE, + LINE_COUNT, line_count); + + PUSH_MTHD(push, NV9039, LAUNCH_DMA, + NVDEF(NV9039, LAUNCH_DMA, SRC_INLINE, FALSE) | + NVDEF(NV9039, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | + NVDEF(NV9039, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | + NVDEF(NV9039, LAUNCH_DMA, COMPLETION_TYPE, FLUSH_DISABLE) | + NVDEF(NV9039, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | + NVDEF(NV9039, LAUNCH_DMA, SEMAPHORE_STRUCT_SIZE, ONE_WORD)); + + page_count -= line_count; + src_offset += (PAGE_SIZE * line_count); + dst_offset += (PAGE_SIZE * line_count); + } + + return 0; + } + + int + nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle) + { + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 2); + if (ret) + return ret; + + PUSH_MTHD(push, NV9039, SET_OBJECT, handle); + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_bo90b5.c index 0000000,34b79d5..8499f58 mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo90b5.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo90b5.c @@@ -1,0 -1,67 +1,67 @@@ + /* + * Copyright 2020 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_mem.h" + + #include + + /*XXX: Fixup class to be compatible with NVIDIA's, which will allow sharing + * code with KeplerDmaCopyA. + */ + + int + nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nouveau_mem *mem = nouveau_mem(old_reg); + struct nvif_push *push = chan->chan.push; + u64 src_offset = mem->vma[0].addr; + u64 dst_offset = mem->vma[1].addr; + u32 page_count = new_reg->num_pages; + int ret; + + page_count = new_reg->num_pages; + while (page_count) { + int line_count = (page_count > 8191) ? 8191 : page_count; + + ret = PUSH_WAIT(push, 10); + if (ret) + return ret; + + PUSH_NVSQ(push, NV90B5, 0x030c, upper_32_bits(src_offset), + 0x0310, lower_32_bits(src_offset), + 0x0314, upper_32_bits(dst_offset), + 0x0318, lower_32_bits(dst_offset), + 0x031c, PAGE_SIZE, + 0x0320, PAGE_SIZE, + 0x0324, PAGE_SIZE, + 0x0328, line_count); + PUSH_NVIM(push, NV90B5, 0x0300, 0x0110); + + page_count -= line_count; + src_offset += (PAGE_SIZE * line_count); + dst_offset += (PAGE_SIZE * line_count); + } + + return 0; + } diff --cc drivers/gpu/drm/nouveau/nouveau_boa0b5.c index 0000000,394e290..5752124 mode 000000,100644..100644 --- a/drivers/gpu/drm/nouveau/nouveau_boa0b5.c +++ b/drivers/gpu/drm/nouveau/nouveau_boa0b5.c @@@ -1,0 -1,90 +1,90 @@@ + /* + * Copyright 2007 Dave Airlied + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + /* + * Authors: Dave Airlied + * Ben Skeggs + * Jeremy Kolb + */ + #include "nouveau_bo.h" + #include "nouveau_dma.h" + #include "nouveau_mem.h" + + #include + + #include + + int + nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, - struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) ++ struct ttm_resource *old_reg, struct ttm_resource *new_reg) + { + struct nouveau_mem *mem = nouveau_mem(old_reg); + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 10); + if (ret) + return ret; + + PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER, + NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(mem->vma[0].addr)), + + OFFSET_IN_LOWER, lower_32_bits(mem->vma[0].addr), + + OFFSET_OUT_UPPER, + NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(mem->vma[1].addr)), + + OFFSET_OUT_LOWER, lower_32_bits(mem->vma[1].addr), + PITCH_IN, PAGE_SIZE, + PITCH_OUT, PAGE_SIZE, + LINE_LENGTH_IN, PAGE_SIZE, + LINE_COUNT, new_reg->num_pages); + + PUSH_IMMD(push, NVA0B5, LAUNCH_DMA, + NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) | + NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) | + NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) | + NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) | + NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) | + NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) | + NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) | + NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) | + NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) | + NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) | + NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, VIRTUAL)); + return 0; + } + + int + nve0_bo_move_init(struct nouveau_channel *chan, u32 handle) + { + struct nvif_push *push = chan->chan.push; + int ret; + + ret = PUSH_WAIT(push, 2); + if (ret) + return ret; + + PUSH_NVSQ(push, NVA0B5, 0x0000, handle & 0x0000ffff); + return 0; + } diff --cc drivers/gpu/drm/ttm/ttm_bo.c index 5589031,cc6a4e7..97ac662 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@@ -640,10 -654,11 +640,10 @@@ static int ttm_bo_evict(struct ttm_buff bdev->driver->evict_flags(bo, &placement); if (!placement.num_placement && !placement.num_busy_placement) { - ret = ttm_bo_pipeline_gutting(bo); - if (ret) - return ret; + ttm_bo_wait(bo, false, false); + ttm_bo_cleanup_memtype_use(bo); - return 0; + return ttm_tt_create(bo, false); } evict_mem = bo->mem;