From: Colin Ian King Date: Tue, 6 Apr 2021 18:27:46 +0000 (+0100) Subject: clk: socfpga: remove redundant initialization of variable div X-Git-Tag: v5.15.73~12078^2~2^3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=52d1a8da40b3c3e165e7b89d1a21a48da196792f;p=platform%2Fkernel%2Flinux-rpi.git clk: socfpga: remove redundant initialization of variable div The variable div is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King Link: https://lore.kernel.org/r/20210406182746.432861-1-colin.king@canonical.com Acked-by: Dinh Nguyen Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/socfpga/clk-gate-s10.c b/drivers/clk/socfpga/clk-gate-s10.c index f9f403d7bb58..b84f2627551e 100644 --- a/drivers/clk/socfpga/clk-gate-s10.c +++ b/drivers/clk/socfpga/clk-gate-s10.c @@ -31,7 +31,7 @@ static unsigned long socfpga_dbg_clk_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) { struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); - u32 div = 1, val; + u32 div, val; val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; val &= GENMASK(socfpgaclk->width - 1, 0); diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index bc37461d43c0..70076a80149d 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -107,7 +107,7 @@ static unsigned long clk_boot_clk_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) { struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk); - u32 div = 1; + u32 div; div = ((readl(socfpgaclk->hw.reg) & SWCTRLBTCLKSEL_MASK) >>