From: Ilia Mirkin <imirkin@alum.mit.edu>
Date: Tue, 1 Dec 2015 20:01:11 +0000 (-0500)
Subject: nv50/ir: allow immediate 0 to be loaded anywhere
X-Git-Tag: upstream/17.1.0~14067
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=52a800a687ee68483fe7cd83b137630b74e2127b;p=platform%2Fupstream%2Fmesa.git

nv50/ir: allow immediate 0 to be loaded anywhere

There's a post-RA fixup to replace 0's with $r63 (or $r127 if too many
regs are used), so just as nvc0, let an immediate 0 be loaded anywhere.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
---

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 94cf0f0e..a0fb144 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -268,6 +268,12 @@ TargetNV50::insnCanLoad(const Instruction *i, int s,
 {
    DataFile sf = ld->src(0).getFile();
 
+   // immediate 0 can be represented by GPR $r63/$r127
+   if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0)
+      return (!i->isPseudo() &&
+              !i->asTex() &&
+              i->op != OP_EXPORT && i->op != OP_STORE);
+
    if (sf == FILE_IMMEDIATE && (i->predSrc >= 0 || i->flagsDef >= 0))
       return false;
    if (s >= opInfo[i->op].srcNr)