From: Noah Goldstein <goldstein.w.n@gmail.com>
Date: Sun, 15 Sep 2024 16:00:34 +0000 (-0700)
Subject: [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722)
X-Git-Tag: upstream/19.1.4~94
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=52a05d380f61f4f04620dc20635a06216c19f276;p=platform%2Fupstream%2Fllvm.git

[X86] Fix missing check of rotate <-> shift equivilence (Issue 108722)

Previous code was checking that rotate and shift where equivilent when
transforming shift -> rotate but not the other way around.

Closes #108767

(cherry picked from commit 81279bf97f187eee0446af00d8ae9ec32a22e878)
---

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 5a9d679d7002..45989bcd07d3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3415,7 +3415,7 @@ unsigned X86TargetLowering::preferedOpcodeForCmpEqPiecesOfOperand(
 
   // We prefer rotate for vectors of if we won't get a zext mask with SRL
   // (PreferRotate will be set in the latter case).
-  if (PreferRotate || VT.isVector())
+  if (PreferRotate || !MayTransformRotate || VT.isVector())
     return ShiftOpc;
 
   // Non-vector type and we have a zext mask with SRL.
diff --git a/llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll b/llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
index 799b54178575..227de9ad0ab6 100644
--- a/llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
+++ b/llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
@@ -997,8 +997,8 @@ define i1 @shr_to_rotate_eq_i32_s5(i32 %x) {
 define i32 @issue108722(i32 %0) {
 ; CHECK-NOBMI-LABEL: issue108722:
 ; CHECK-NOBMI:       # %bb.0:
-; CHECK-NOBMI-NEXT:    movzbl %dil, %ecx
-; CHECK-NOBMI-NEXT:    shrl $24, %edi
+; CHECK-NOBMI-NEXT:    movl %edi, %ecx
+; CHECK-NOBMI-NEXT:    roll $24, %ecx
 ; CHECK-NOBMI-NEXT:    xorl %eax, %eax
 ; CHECK-NOBMI-NEXT:    cmpl %edi, %ecx
 ; CHECK-NOBMI-NEXT:    sete %al