From: Neil Armstrong Date: Sun, 10 Feb 2019 10:16:21 +0000 (+0000) Subject: x86: dts: switch spi-flash to jedec, spi-nor compatible X-Git-Tag: v2019.07-rc1~24^2~11 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=51e4e3e5d039b58e13fa5c1516f5e2cb77e91a72;p=platform%2Fkernel%2Fu-boot.git x86: dts: switch spi-flash to jedec, spi-nor compatible The x86 code and DT uses "spi-flash" to detect a flash node, switch to "jedec,spi-nor" in the DTS files and in fdtdec by switching the GENERIC_SPI_FLASH value to to jedec,spi-nor. Signed-off-by: Neil Armstrong Reviewed-by: Simon Goldschmidt Reviewed-by: Jagan Teki --- diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 291dc07..d0168e8 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -175,7 +175,7 @@ #size-cells = <1>; reg = <0>; compatible = "winbond,w25q64dw", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index 4e8a761..5abbc66 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -199,7 +199,7 @@ #size-cells = <1>; reg = <0>; compatible = "macronix,mx25l6405d", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 39e2d2f..37146fd 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -147,7 +147,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0>; - compatible = "macronix,mx25u6435f", "spi-flash"; + compatible = "macronix,mx25u6435f", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index c5653fe..09488f1 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -429,7 +429,7 @@ u-boot,dm-pre-reloc; reg = <0>; compatible = "winbond,w25q64", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index ad687ce..35211ed 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -567,7 +567,7 @@ #address-cells = <1>; reg = <0>; compatible = "winbond,w25q64", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index f56e482..bcd4c4d 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -47,7 +47,7 @@ #address-cells = <1>; reg = <0>; compatible = "winbond,w25q64", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 5884dbc..70b8c04 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -186,7 +186,7 @@ #size-cells = <1>; reg = <0>; compatible = "stmicro,n25q064a", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index 9801790..c6ba811 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -154,7 +154,7 @@ spi-flash@0 { reg = <0>; - compatible = "winbond,w25q64bv", "spi-flash"; + compatible = "winbond,w25q64bv", "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; }; }; diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 8938a94..f492c35 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -224,7 +224,7 @@ spi-flash@0 { reg = <0>; compatible = "sst,25vf016b", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xffe00000 0x00200000>; }; }; diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index 51d33e7..e9930cb 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -197,7 +197,7 @@ #size-cells = <1>; reg = <0>; compatible = "stmicro,n25q064a", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 3a5d168..5de4568 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -139,7 +139,7 @@ #address-cells = <1>; reg = <0>; compatible = "winbond,w25q64", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 6c65fb9..f4cdb2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -199,7 +199,7 @@ #size-cells = <1>; reg = <0>; compatible = "stmicro,n25q064a", - "spi-flash"; + "jedec,spi-nor"; memory-map = <0xff800000 0x00800000>; rw-mrc-cache { label = "rw-mrc-cache"; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index a51dc5e..21f1eee 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -45,7 +45,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), - COMPAT(GENERIC_SPI_FLASH, "spi-flash"), + COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"), COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), COMPAT(INTEL_MICROCODE, "intel,microcode"), COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),