From: Samuel Pitoiset Date: Wed, 13 Jun 2018 18:19:23 +0000 (+0200) Subject: radv: don't fast clear HTILE for 16-bit depth surfaces on GFX8 X-Git-Tag: upstream/19.0.0~4671 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=51e23d34190076159129dd7b449b95a1ac3d4949;p=platform%2Fupstream%2Fmesa.git radv: don't fast clear HTILE for 16-bit depth surfaces on GFX8 This causes rendering issues in Shadow Warrior 2 with DXVK. Cc: mesa-stable@lists.freedesktop.org Fixes: ccc64f3133 ("radv: enable TC-compat HTILE for 16-bit depth surfaces on GFX8") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106912 Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index fae441c..373072d 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -717,6 +717,14 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer, if ((clear_value.depth != 0.0 && clear_value.depth != 1.0) || !(aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) goto fail; + /* GFX8 only supports 32-bit depth surfaces but we can enable TC-compat + * HTILE for 16-bit surfaces if no Z planes are compressed. Though, + * fast HTILE clears don't seem to work. + */ + if (cmd_buffer->device->physical_device->rad_info.chip_class == VI && + iview->image->vk_format == VK_FORMAT_D16_UNORM) + goto fail; + if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) { if (clear_value.stencil != 0 || !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) goto fail;