From: Huang Shijie <b32955@freescale.com>
Date: Tue, 28 May 2013 06:20:12 +0000 (+0800)
Subject: ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR
X-Git-Tag: v3.11-rc1~151^2~9^2~15
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=50fe0e903d42e9cccea7cb9c894137ae65893f54;p=profile%2Fivi%2Fkernel-x86-ivi.git

ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR

Enable the WEIM NOR for imx6q{dl}-sabreauto boards.

For the pin conflict with SPI NOR, its status is set to "disabled".

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index a4466e6..e994011 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -58,3 +58,22 @@
 	wp-gpios = <&gpio1 13 0>;
 	status = "okay";
 };
+
+&weim {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>;
+	#address-cells = <2>;
+	#size-cells = <1>;
+	ranges = <0 0 0x08000000 0x08000000>;
+	status = "disabled"; /* pin conflict with SPI NOR */
+
+	nor@0,0 {
+		compatible = "cfi-flash";
+		reg = <0 0 0x02000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		bank-width = <2>;
+		fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
+				0x0000c000 0x1404a38e 0x00000000>;
+	};
+};