From: Dongwoo Lee Date: Thu, 24 Nov 2016 04:40:39 +0000 (+0900) Subject: usb: xhci-exynos5: Disable USB 3.0 port for host mode X-Git-Tag: submit/tizen/20161205.013353^0 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=50fd2475af5c1fe9ba84956c075798e7b3fbf95b;p=platform%2Fkernel%2Fu-boot.git usb: xhci-exynos5: Disable USB 3.0 port for host mode xhci driver have not been completely implemented, so the controller cannot recognize the USB 3.0 device when it is connected to xhci-hosted port. This patch disable USB 3.0 port of xhci host, then super-speed devices can be recognized as at least high-speed devices. Change-Id: I6100f6c441993ae882db371d880a457cdcde4ae5 Reported-by: Seung-Woo Kim Signed-off-by: Dongwoo Lee --- diff --git a/arch/arm/mach-exynos/include/mach/xhci-exynos.h b/arch/arm/mach-exynos/include/mach/xhci-exynos.h index 92b90a462c..3ac18098d4 100644 --- a/arch/arm/mach-exynos/include/mach/xhci-exynos.h +++ b/arch/arm/mach-exynos/include/mach/xhci-exynos.h @@ -63,6 +63,10 @@ #define PHYBATCHG_UTMI_CLKSEL (0x1 << 2) + +#define LINK_PORT_HOST_U3_PORT_DISABLE (0x1 << 8) +#define LINK_PORT_HOST_U2_PORT_DISABLE (0x1 << 7) + #define FSEL_CLKSEL_24M (0x5) /* XHCI PHY register structure */ diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c index 28416ed106..302a0eba8c 100644 --- a/drivers/usb/host/xhci-exynos5.c +++ b/drivers/usb/host/xhci-exynos5.c @@ -110,6 +110,15 @@ static void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy) writel(0x0, &phy->phy_resume); + /* + * FIXME: If xhci becomes being able to fully support super-speed + * devices, this should be reverted. + * + * Disable USB 3.0 port and enable USB 2.0 port only + */ + clrbits_le32(&phy->link_port, LINK_PORT_HOST_U2_PORT_DISABLE); + setbits_le32(&phy->link_port, LINK_PORT_HOST_U3_PORT_DISABLE); + /* * Setting the Frame length Adj value[6:1] to default 0x20 * See xHCI 1.0 spec, 5.2.4