From: LiaoShihua <shihua@iscas.ac.cn>
Date: Mon, 27 Dec 2021 04:03:08 +0000 (+0800)
Subject: RISC-V: fixed testcase riscv/pr103302.c
X-Git-Tag: upstream/12.2.0~2577
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=500d3f0a302900fba12f41c2c1eedcf0bea4ffa7;p=platform%2Fupstream%2Fgcc.git

RISC-V: fixed testcase riscv/pr103302.c

Because riscv32 not support __int128, so skip if -march=rv32*.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/pr103302.c: skip if -march=rv32*
---

diff --git a/gcc/testsuite/gcc.target/riscv/pr103302.c b/gcc/testsuite/gcc.target/riscv/pr103302.c
index 822c408..cfaa222 100644
--- a/gcc/testsuite/gcc.target/riscv/pr103302.c
+++ b/gcc/testsuite/gcc.target/riscv/pr103302.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target int128 } } */
 /* { dg-options "-Og -fharden-compares -fno-tree-dce -fno-tree-fre " } */
 
 typedef unsigned char u8;