From: Tim Harvey <tharvey@gateworks.com>
Date: Tue, 27 Jul 2021 16:10:58 +0000 (-0700)
Subject: arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config
X-Git-Tag: accepted/tizen/unified/20230118.172025~6510^2~10^2~11
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=500659f3b401fe6ffd1d63f2449d16d8a4204db7;p=platform%2Fkernel%2Flinux-rpi.git

arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config

The GW700x PMIC does not have an interrupt. Remove the invalid pin
config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
index 11dda79..00f86ca 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
@@ -278,8 +278,6 @@
 
 	pmic@69 {
 		compatible = "mps,mp5416";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pmic>;
 		reg = <0x69>;
 
 		regulators {
@@ -444,12 +442,6 @@
 		>;
 	};
 
-	pinctrl_pmic: pmicgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
-		>;
-	};
-
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140