From: Nicolin Chen Date: Tue, 6 May 2014 08:56:02 +0000 (+0800) Subject: ASoC: fsl_esai: Set PCRC and PRRC registers at the end of hw_params() X-Git-Tag: v5.15~17838^2~7^2^3 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4f8210f66e5a200c63770ea9445ff913a28a3be2;p=platform%2Fkernel%2Flinux-starfive.git ASoC: fsl_esai: Set PCRC and PRRC registers at the end of hw_params() According to Reference Manual -- ESAI Initialization chapter, as the standard procedure of ESAI personal reset, the PCRC and PRRC registers should be remained in its reset value and then configured after T/RCCR and T/RCR configurations's done but before TE/RE's enabling. So this patch moves PCRC and PRRC settings to the end of hw_params(). Signed-off-by: Nicolin Chen Signed-off-by: Mark Brown --- diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index c674fd9..496ce2e 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -461,12 +461,6 @@ static int fsl_esai_startup(struct snd_pcm_substream *substream, } if (!dai->active) { - /* Reset Port C */ - regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC, - ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO)); - regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC, - ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO)); - /* Set synchronous mode */ regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR, ESAI_SAICR_SYNC, esai_priv->synchronous ? @@ -526,6 +520,11 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val); + /* Remove ESAI personal reset by configuring ESAI_PCRC and ESAI_PRRC */ + regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC, + ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO)); + regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC, + ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO)); return 0; }