From: Samuel Pitoiset Date: Tue, 20 Mar 2018 09:07:30 +0000 (+0100) Subject: radv: only enable one channel when exporting prim id X-Git-Tag: upstream/18.1.0~776 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4e9b0b39b592e2bf79ac577ec6cd091a924359ae;p=platform%2Fupstream%2Fmesa.git radv: only enable one channel when exporting prim id It's a 32-bit integer like the layer. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index ad046ad..c8d383e 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -2357,7 +2357,7 @@ handle_vs_outputs_post(struct radv_shader_context *ctx, for (unsigned j = 1; j < 4; j++) values[j] = ctx->ac.f32_0; - radv_export_param(ctx, param_count, values, 0xf); + radv_export_param(ctx, param_count, values, 0x1); outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count++; outinfo->export_prim_id = true;