From: Yao Qi Date: Wed, 13 Jan 2016 16:15:31 +0000 (+0000) Subject: Read instruction with byte_order_for_code X-Git-Tag: gdb-7.11-release~269 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4e7b8beaa3b7b9ac8577b10afa9d58bb9d453b08;p=external%2Fbinutils.git Read instruction with byte_order_for_code When reading instruction, we should use byte_order_for_code instead of byte_order. gdb: 2016-01-13 Yao Qi * arch/arm-get-next-pcs.c (arm_get_next_pcs_raw): Use byte_order_for_code to read instruction. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index e071964..a590a9f 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2016-01-13 Yao Qi + + * arch/arm-get-next-pcs.c (arm_get_next_pcs_raw): Use + byte_order_for_code to read instruction. + 2016-01-13 Pedro Alves * NEWS: Mention $_gthread. diff --git a/gdb/arch/arm-get-next-pcs.c b/gdb/arch/arm-get-next-pcs.c index aba45e3..137df1d 100644 --- a/gdb/arch/arm-get-next-pcs.c +++ b/gdb/arch/arm-get-next-pcs.c @@ -644,6 +644,7 @@ static VEC (CORE_ADDR) * arm_get_next_pcs_raw (struct arm_get_next_pcs *self, CORE_ADDR pc) { int byte_order = self->byte_order; + int byte_order_for_code = self->byte_order_for_code; unsigned long pc_val; unsigned long this_instr = 0; unsigned long status; @@ -652,7 +653,7 @@ arm_get_next_pcs_raw (struct arm_get_next_pcs *self, CORE_ADDR pc) VEC (CORE_ADDR) *next_pcs = NULL; pc_val = (unsigned long) pc; - this_instr = self->ops->read_mem_uint (pc, 4, byte_order); + this_instr = self->ops->read_mem_uint (pc, 4, byte_order_for_code); status = regcache_raw_get_unsigned (regcache, ARM_PS_REGNUM); nextpc = (CORE_ADDR) (pc_val + 4); /* Default case */