From: Kishon Vijay Abraham I Date: Wed, 15 Sep 2021 05:53:56 +0000 (+0530) Subject: arm64: dts: ti: j7200-main: Fix "bus-range" upto 256 bus number for PCIe X-Git-Tag: accepted/tizen/unified/20230118.172025~5484 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4def729518ec83222326f9fa0b0c2b275d7c5467;p=platform%2Fkernel%2Flinux-rpi.git arm64: dts: ti: j7200-main: Fix "bus-range" upto 256 bus number for PCIe [ Upstream commit 8bb8429290c0043a78804ae48294b53f781ee426 ] commit 3276d9f53cf6 ("arm64: dts: ti: k3-j7200-main: Add PCIe device tree node") incorrectly added PCIe bus numbers from 0 to 15 (copy-paste from J721E node). Enable all the supported bus numbers from 0 to 255 defined in PCIe spec here. Fixes: 3276d9f53cf6 ("arm64: dts: ti: k3-j7200-main: Add PCIe device tree node") Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Aswath Govindraju Signed-off-by: Nishanth Menon Link: https://lore.kernel.org/r/20210915055358.19997-5-kishon@ti.com Signed-off-by: Sasha Levin --- diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 521a563..874cba7 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -606,7 +606,7 @@ clock-names = "fck"; #address-cells = <3>; #size-cells = <2>; - bus-range = <0x0 0xf>; + bus-range = <0x0 0xff>; cdns,no-bar-match-nbits = <64>; vendor-id = <0x104c>; device-id = <0xb00f>;