From: Michael Kostylev Date: Wed, 15 May 2013 00:25:30 +0000 (-0400) Subject: sparc: Eliminate dead code in VIS acceleration macros X-Git-Tag: v10_alpha1~1517 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4dbceaa3a84c577e9d79f8c440ee7c223ac917d6;p=platform%2Fupstream%2Flibav.git sparc: Eliminate dead code in VIS acceleration macros Signed-off-by: Diego Biurrun --- diff --git a/libavcodec/sparc/vis.h b/libavcodec/sparc/vis.h index 04b70c3..30dc166 100644 --- a/libavcodec/sparc/vis.h +++ b/libavcodec/sparc/vis.h @@ -173,32 +173,6 @@ static inline void vis_set_gsr(unsigned int _val) #define vis_st64(rs1,mem) vis_r2m(std, rs1, mem) #define vis_st64_2(rs1,mem1,mem2) vis_r2m_2(std, rs1, mem1, mem2) -#define vis_ldblk(mem, rd) \ -do { register void *__mem __asm__("g1"); \ - __mem = &(mem); \ - __asm__ volatile(".word 0xc1985e00 | %1" \ - : \ - : "r" (__mem), \ - "i" (vis_rd_d(rd)) \ - : "memory"); \ -} while (0) - -#define vis_stblk(rd, mem) \ -do { register void *__mem __asm__("g1"); \ - __mem = &(mem); \ - __asm__ volatile(".word 0xc1b85e00 | %1" \ - : \ - : "r" (__mem), \ - "i" (vis_rd_d(rd)) \ - : "memory"); \ -} while (0) - -#define vis_membar_storestore() \ - __asm__ volatile(".word 0x8143e008" : : : "memory") - -#define vis_membar_sync() \ - __asm__ volatile(".word 0x8143e040" : : : "memory") - /* 16 and 32 bit partitioned addition and subtraction. The normal * versions perform 4 16-bit or 2 32-bit additions or subtractions. * The 's' versions perform 2 16-bit or 1 32-bit additions or @@ -266,38 +240,6 @@ static inline void vis_alignaddr_g0(void *_ptr) vis_rd_s(0))); } -static inline void *vis_alignaddrl(void *_ptr) -{ - register void *ptr __asm__("g1"); - - ptr = _ptr; - - __asm__ volatile(".word %2" - : "=&r" (ptr) - : "0" (ptr), - "i" (vis_opc_base | vis_opf(0x19) | - vis_rs1_s(1) | - vis_rs2_s(0) | - vis_rd_s(1))); - - return ptr; -} - -static inline void vis_alignaddrl_g0(void *_ptr) -{ - register void *ptr __asm__("g1"); - - ptr = _ptr; - - __asm__ volatile(".word %2" - : "=&r" (ptr) - : "0" (ptr), - "i" (vis_opc_base | vis_opf(0x19) | - vis_rs1_s(1) | - vis_rs2_s(0) | - vis_rd_s(0))); -} - #define vis_faligndata(rs1,rs2,rd) vis_dd2d(0x48, rs1, rs2, rd) /* Logical operate instructions. */