From: Roman Lebedev Date: Wed, 22 Apr 2020 11:57:57 +0000 (+0300) Subject: [NFC][InstCombine] Add shuffle negation tests X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4d44ce7437816501154da4c3a8d68a854a3c23eb;p=platform%2Fupstream%2Fllvm.git [NFC][InstCombine] Add shuffle negation tests --- diff --git a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll index 40cb4aa..21f695f 100644 --- a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll +++ b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll @@ -622,3 +622,56 @@ define i8 @negate_zext_wrongwidth(i8 %x, i2 %y) { %t1 = sub i8 %x, %t0 ret i8 %t1 } + +define <2 x i4> @negate_shufflevector_oneinput_reverse(<2 x i4> %x, <2 x i4> %y) { +; CHECK-LABEL: @negate_shufflevector_oneinput_reverse( +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> , [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> undef, <2 x i32> +; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]] +; CHECK-NEXT: ret <2 x i4> [[T2]] +; + %t0 = shl <2 x i4> , %x + %t1 = shufflevector <2 x i4> %t0, <2 x i4> undef, <2 x i32> + %t2 = sub <2 x i4> %y, %t1 + ret <2 x i4> %t2 +} +define <2 x i4> @negate_shufflevector_oneinput_second_lane_is_undef(<2 x i4> %x, <2 x i4> %y) { +; CHECK-LABEL: @negate_shufflevector_oneinput_second_lane_is_undef( +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> , [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> undef, <2 x i32> +; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]] +; CHECK-NEXT: ret <2 x i4> [[T2]] +; + %t0 = shl <2 x i4> , %x + %t1 = shufflevector <2 x i4> %t0, <2 x i4> undef, <2 x i32> + %t2 = sub <2 x i4> %y, %t1 + ret <2 x i4> %t2 +} +define <2 x i4> @negate_shufflevector_twoinputs(<2 x i4> %x, <2 x i4> %y, <2 x i4> %z) { +; CHECK-LABEL: @negate_shufflevector_twoinputs( +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> , [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = xor <2 x i4> [[Y:%.*]], +; CHECK-NEXT: [[T2:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> [[T1]], <2 x i32> +; CHECK-NEXT: [[T3:%.*]] = sub <2 x i4> [[Z:%.*]], [[T2]] +; CHECK-NEXT: ret <2 x i4> [[T3]] +; + %t0 = shl <2 x i4> , %x + %t1 = xor <2 x i4> %y, + %t2 = shufflevector <2 x i4> %t0, <2 x i4> %t1, <2 x i32> + %t3 = sub <2 x i4> %z, %t2 + ret <2 x i4> %t3 +} +define <2 x i4> @negate_shufflevector_oneinput_extrause(<2 x i4> %x, <2 x i4> %y) { +; CHECK-LABEL: @negate_shufflevector_oneinput_extrause( +; CHECK-NEXT: [[T0:%.*]] = shl <2 x i4> , [[X:%.*]] +; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x i4> [[T0]], <2 x i4> undef, <2 x i32> +; CHECK-NEXT: call void @use_v2i4(<2 x i4> [[T1]]) +; CHECK-NEXT: [[T2:%.*]] = sub <2 x i4> [[Y:%.*]], [[T1]] +; CHECK-NEXT: ret <2 x i4> [[T2]] +; + %t0 = shl <2 x i4> , %x + %t1 = shufflevector <2 x i4> %t0, <2 x i4> undef, <2 x i32> + call void @use_v2i4(<2 x i4> %t1) + %t2 = sub <2 x i4> %y, %t1 + ret <2 x i4> %t2 +}