From: Kyungmin Park Date: Fri, 5 Mar 2010 09:34:17 +0000 (+0900) Subject: s5pc110: Fix DMC1 200MHz Timing Row and set EMRS X-Git-Tag: JC05_20100308~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4d22c60265e9e1a69bf195e64c59025134bcdae2;p=kernel%2Fu-boot.git s5pc110: Fix DMC1 200MHz Timing Row and set EMRS Signed-off-by: Kyungmin Park --- diff --git a/board/samsung/universal/mem_setup.S b/board/samsung/universal/mem_setup.S index b80d74a..563a992 100644 --- a/board/samsung/universal/mem_setup.S +++ b/board/samsung/universal/mem_setup.S @@ -222,7 +222,7 @@ swap_memory: ldr r1, =0x14233287 str r1, [r0, #0x034] @ TIMINGROW_OFFSET - ldrne r1, =0x11344309 + ldrne r1, =0x18344309 strne r1, [r6, #0x034] @ TIMINGROW_OFFSET ldr r1, =0x12130005 @@ -253,11 +253,16 @@ swap_memory: str r1, [r0, #0x010] @ DIRECTCMD_OFFSET strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET - /* chip0 MRS, CL%LE %LONG3, BL%LE %LONG4 */ + /* chip0 MRS */ ldr r1, =0x00000032 str r1, [r0, #0x010] @ DIRECTCMD_OFFSET strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET + /* chip0 EMRS */ + ldr r1, =0x00020020 + str r1, [r0, #0x010] @ DIRECTCMD_OFFSET + strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET + /* chip1 Deselect */ ldr r1, =0x07100000 str r1, [r0, #0x010] @ DIRECTCMD_OFFSET @@ -276,11 +281,16 @@ swap_memory: str r1, [r0, #0x010] @ DIRECTCMD_OFFSET strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET - /* chip1 MRS, CL%LE %LONG3, BL%LE %LONG4 */ + /* chip1 MRS */ ldr r1, =0x00100032 str r1, [r0, #0x010] @ DIRECTCMD_OFFSET strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET + /* chip1 EMRS */ + ldr r1, =0x00120020 + str r1, [r0, #0x010] @ DIRECTCMD_OFFSET + strne r1, [r6, #0x010] @ DIRECTCMD_OFFSET + /* auto refresh on */ #ifdef NEW_MEMORY_TIMING ldr r1, =0x0FFF10B0