From: Zhang Qilong Date: Sat, 24 Sep 2022 12:13:07 +0000 (+0800) Subject: spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe X-Git-Tag: v6.1-rc5~19^2~26^2~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4d0ef0a1c35189a6e8377d8ee8310ea5ef22c5f3;p=platform%2Fkernel%2Flinux-starfive.git spi: cadence-quadspi: Fix PM disable depth imbalance in cqspi_probe The pm_runtime_enable will increase power disable depth. Thus a pairing decrement is needed on the error handling path to keep it balanced according to context. Fixes:73d5fe0462702 ("spi: cadence-quadspi: Remove spi_master_put() in probe failure path") Signed-off-by: Zhang Qilong Link: https://lore.kernel.org/r/20220924121310.78331-2-zhangqilong3@huawei.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 72b1a5a..106c09f 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1619,7 +1619,7 @@ static int cqspi_probe(struct platform_device *pdev) pm_runtime_enable(dev); ret = pm_runtime_resume_and_get(dev); if (ret < 0) - return ret; + goto probe_pm_failed; ret = clk_prepare_enable(cqspi->clk); if (ret) { @@ -1712,6 +1712,7 @@ probe_reset_failed: clk_disable_unprepare(cqspi->clk); probe_clk_failed: pm_runtime_put_sync(dev); +probe_pm_failed: pm_runtime_disable(dev); return ret; }