From: Sebastian Herbszt <herbszt@gmx.de>
Date: Sat, 13 Jun 2009 21:03:29 +0000 (+0200)
Subject: lsi53c895a: Implement write access to DMA Byte Counter
X-Git-Tag: TizenStudio_2.0_p2.3~8651
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4ceb182ca405c3b45047f8f134897f8a50058a4b;p=sdk%2Femulator%2Fqemu.git

lsi53c895a: Implement write access to DMA Byte Counter

Adds CASE_SET_REG24 and fixes the following errors:

lsi_scsi: error: Unhandled writeb 0x24 = 0x0
lsi_scsi: error: Unhandled writeb 0x25 = 0x0

Signed-off-by: Sebastian Herbszt <herbszt@gmx.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---

diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 3c23ddc..71f8281 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1492,6 +1492,11 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
 
 static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
 {
+#define CASE_SET_REG24(name, addr) \
+    case addr    : s->name &= 0xffffff00; s->name |= val;       break; \
+    case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8;  break; \
+    case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break;
+
 #define CASE_SET_REG32(name, addr) \
     case addr    : s->name &= 0xffffff00; s->name |= val;       break; \
     case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8;  break; \
@@ -1596,6 +1601,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
         }
         s->ctest5 = val;
         break;
+    CASE_SET_REG24(dbc, 0x24)
     CASE_SET_REG32(dnad, 0x28)
     case 0x2c: /* DSP[0:7] */
         s->dsp &= 0xffffff00;
@@ -1710,6 +1716,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
             BADF("Unhandled writeb 0x%x = 0x%x\n", offset, val);
         }
     }
+#undef CASE_SET_REG24
 #undef CASE_SET_REG32
 }