From: Hui Tang Date: Wed, 16 Mar 2022 11:26:03 +0000 (+0800) Subject: crypto: hisilicon/qm - optimize the barrier operation X-Git-Tag: v6.1-rc5~1227^2~109 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4cda2f4a0ee68a23cadfa8cc0fce9af548c29fe2;p=platform%2Fkernel%2Flinux-starfive.git crypto: hisilicon/qm - optimize the barrier operation A 'dma_wmb' barrier is enough to guarantee previous writes before accessing by acc device in the outer shareable domain. A 'smp_wmb' barrier is enough to guarantee previous writes before accessing by other cpus in the inner shareble domain. Signed-off-by: Hui Tang Signed-off-by: Herbert Xu --- diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 0091323..c5c507f 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -687,13 +687,13 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src) if (!IS_ENABLED(CONFIG_ARM64)) { memcpy_toio(fun_base, src, 16); - wmb(); + dma_wmb(); return; } asm volatile("ldp %0, %1, %3\n" "stp %0, %1, %2\n" - "dsb sy\n" + "dmb oshst\n" : "=&r" (tmp0), "=&r" (tmp1), "+Q" (*((char __iomem *)fun_base)) @@ -982,7 +982,7 @@ static void qm_set_qp_disable(struct hisi_qp *qp, int offset) *addr = 1; /* make sure setup is completed */ - mb(); + smp_wmb(); } static void qm_disable_qp(struct hisi_qm *qm, u32 qp_id)