From: Artem Belevich Date: Thu, 22 Mar 2018 16:47:41 +0000 (+0000) Subject: [CUDA] add REQUIRES fields for CUDA variants of LTO tests. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4c86af7579156d3d07fb4cb6148786e56b03b9ca;p=platform%2Fupstream%2Fllvm.git [CUDA] add REQUIRES fields for CUDA variants of LTO tests. Also relax checking for nvptx triple. This should avoid test failure if the test is executed on 32-bit platform. llvm-svn: 328213 --- diff --git a/clang/test/Driver/lto.cu b/clang/test/Driver/lto.cu index 40c9988..821dfcd 100644 --- a/clang/test/Driver/lto.cu +++ b/clang/test/Driver/lto.cu @@ -1,3 +1,7 @@ +// REQUIRES: clang-driver +// REQUIRES: x86-registered-target +// REQUIRES: nvptx-registered-target + // -flto causes a switch to llvm-bc object files. // RUN: %clangxx -nocudainc -nocudalib -ccc-print-phases -c %s -flto 2> %t // RUN: FileCheck -check-prefix=CHECK-COMPILE-ACTIONS < %t %s @@ -17,8 +21,8 @@ // CHECK-COMPILELINK-ACTIONS: 5: compiler, {4}, ir, (device-cuda, sm_20) // CHECK-COMPILELINK-ACTIONS: 6: backend, {5}, assembler, (device-cuda, sm_20) // CHECK-COMPILELINK-ACTIONS: 7: assembler, {6}, object, (device-cuda, sm_20) -// CHECK-COMPILELINK-ACTIONS: 8: offload, "device-cuda (nvptx64-nvidia-cuda:sm_20)" {7}, object -// CHECK-COMPILELINK-ACTIONS: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_20)" {6}, assembler +// CHECK-COMPILELINK-ACTIONS: 8: offload, "device-cuda (nvptx{{.*}}-nvidia-cuda:sm_20)" {7}, object +// CHECK-COMPILELINK-ACTIONS: 9: offload, "device-cuda (nvptx{{.*}}-nvidia-cuda:sm_20)" {6}, assembler // CHECK-COMPILELINK-ACTIONS: 10: linker, {8, 9}, cuda-fatbin, (device-cuda) // CHECK-COMPILELINK-ACTIONS: 11: offload, "host-cuda {{.*}}" {2}, "device-cuda{{.*}}" {10}, ir // CHECK-COMPILELINK-ACTIONS: 12: backend, {11}, lto-bc, (host-cuda) diff --git a/clang/test/Driver/thinlto.cu b/clang/test/Driver/thinlto.cu index 7a87015..c5a76b0 100644 --- a/clang/test/Driver/thinlto.cu +++ b/clang/test/Driver/thinlto.cu @@ -1,3 +1,7 @@ +// REQUIRES: clang-driver +// REQUIRES: x86-registered-target +// REQUIRES: nvptx-registered-target + // -flto=thin causes a switch to llvm-bc object files. // RUN: %clangxx -ccc-print-phases -nocudainc -nocudalib -c %s -flto=thin 2> %t // RUN: FileCheck -check-prefix=CHECK-COMPILE-ACTIONS < %t %s @@ -17,8 +21,8 @@ // CHECK-COMPILELINK-ACTIONS: 5: compiler, {4}, ir, (device-cuda, sm_20) // CHECK-COMPILELINK-ACTIONS: 6: backend, {5}, assembler, (device-cuda, sm_20) // CHECK-COMPILELINK-ACTIONS: 7: assembler, {6}, object, (device-cuda, sm_20) -// CHECK-COMPILELINK-ACTIONS: 8: offload, "device-cuda (nvptx64-nvidia-cuda:sm_20)" {7}, object -// CHECK-COMPILELINK-ACTIONS: 9: offload, "device-cuda (nvptx64-nvidia-cuda:sm_20)" {6}, assembler +// CHECK-COMPILELINK-ACTIONS: 8: offload, "device-cuda (nvptx{{.*}}-nvidia-cuda:sm_20)" {7}, object +// CHECK-COMPILELINK-ACTIONS: 9: offload, "device-cuda (nvptx{{.*}}-nvidia-cuda:sm_20)" {6}, assembler // CHECK-COMPILELINK-ACTIONS: 10: linker, {8, 9}, cuda-fatbin, (device-cuda) // CHECK-COMPILELINK-ACTIONS: 11: offload, "host-cuda {{.*}}" {2}, "device-cuda{{.*}}" {10}, ir // CHECK-COMPILELINK-ACTIONS: 12: backend, {11}, lto-bc, (host-cuda)