From: Abhinav Kumar Date: Wed, 12 Jul 2023 01:20:01 +0000 (-0700) Subject: drm/msm/dpu: rename all hw_intf structs to have dpu_hw prefix X-Git-Tag: v6.6.17~3937^2~4^2~80 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4c6df9a40bbce2b2b9f50baf82a95a1f6ece314e;p=platform%2Fkernel%2Flinux-rpi.git drm/msm/dpu: rename all hw_intf structs to have dpu_hw prefix dpu_hw_intf has a few instances of structs which do not have the dpu_hw prefix. Lets fix this by renaming those structs and updating the usage of those accordingly. Signed-off-by: Abhinav Kumar Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/546805/ Link: https://lore.kernel.org/r/20230712012003.2212-4-quic_abhinavk@quicinc.com Signed-off-by: Dmitry Baryshkov --- diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 662d74d..c2189e5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -40,7 +40,7 @@ static bool dpu_encoder_phys_vid_is_master( static void drm_mode_to_intf_timing_params( const struct dpu_encoder_phys *phys_enc, const struct drm_display_mode *mode, - struct intf_timing_params *timing) + struct dpu_hw_intf_timing_params *timing) { memset(timing, 0, sizeof(*timing)); @@ -114,7 +114,7 @@ static void drm_mode_to_intf_timing_params( } } -static u32 get_horizontal_total(const struct intf_timing_params *timing) +static u32 get_horizontal_total(const struct dpu_hw_intf_timing_params *timing) { u32 active = timing->xres; u32 inactive = @@ -123,7 +123,7 @@ static u32 get_horizontal_total(const struct intf_timing_params *timing) return active + inactive; } -static u32 get_vertical_total(const struct intf_timing_params *timing) +static u32 get_vertical_total(const struct dpu_hw_intf_timing_params *timing) { u32 active = timing->yres; u32 inactive = @@ -148,7 +148,7 @@ static u32 get_vertical_total(const struct intf_timing_params *timing) */ static u32 programmable_fetch_get_num_lines( struct dpu_encoder_phys *phys_enc, - const struct intf_timing_params *timing) + const struct dpu_hw_intf_timing_params *timing) { u32 worst_case_needed_lines = phys_enc->hw_intf->cap->prog_fetch_lines_worst_case; @@ -196,9 +196,9 @@ static u32 programmable_fetch_get_num_lines( * @timing: Pointer to the intf timing information for the requested mode */ static void programmable_fetch_config(struct dpu_encoder_phys *phys_enc, - const struct intf_timing_params *timing) + const struct dpu_hw_intf_timing_params *timing) { - struct intf_prog_fetch f = { 0 }; + struct dpu_hw_intf_prog_fetch f = { 0 }; u32 vfp_fetch_lines = 0; u32 horiz_total = 0; u32 vert_total = 0; @@ -231,7 +231,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine( struct dpu_encoder_phys *phys_enc) { struct drm_display_mode mode; - struct intf_timing_params timing_params = { 0 }; + struct dpu_hw_intf_timing_params timing_params = { 0 }; const struct dpu_format *fmt = NULL; u32 fmt_fourcc = DRM_FORMAT_RGB888; unsigned long lock_flags; @@ -522,7 +522,7 @@ static void dpu_encoder_phys_vid_disable(struct dpu_encoder_phys *phys_enc) { unsigned long lock_flags; int ret; - struct intf_status intf_status = {0}; + struct dpu_hw_intf_status intf_status = {0}; if (!phys_enc->parent || !phys_enc->parent->dev) { DPU_ERROR("invalid encoder/device\n"); @@ -651,7 +651,7 @@ static int dpu_encoder_phys_vid_get_line_count( static int dpu_encoder_phys_vid_get_frame_count( struct dpu_encoder_phys *phys_enc) { - struct intf_status s = {0}; + struct dpu_hw_intf_status s = {0}; u32 fetch_start = 0; struct drm_display_mode mode; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index d766791..7392880d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -95,7 +95,7 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *ctx, - const struct intf_timing_params *p, + const struct dpu_hw_intf_timing_params *p, const struct dpu_format *fmt) { struct dpu_hw_blk_reg_map *c = &ctx->hw; @@ -244,7 +244,7 @@ static void dpu_hw_intf_enable_timing_engine( static void dpu_hw_intf_setup_prg_fetch( struct dpu_hw_intf *intf, - const struct intf_prog_fetch *fetch) + const struct dpu_hw_intf_prog_fetch *fetch) { struct dpu_hw_blk_reg_map *c = &intf->hw; int fetch_enable; @@ -286,7 +286,7 @@ static void dpu_hw_intf_bind_pingpong_blk( static void dpu_hw_intf_get_status( struct dpu_hw_intf *intf, - struct intf_status *s) + struct dpu_hw_intf_status *s) { struct dpu_hw_blk_reg_map *c = &intf->hw; unsigned long cap = intf->cap->features; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h index 3b5f18d..bd6f542 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h @@ -14,7 +14,7 @@ struct dpu_hw_intf; /* intf timing settings */ -struct intf_timing_params { +struct dpu_hw_intf_timing_params { u32 width; /* active width */ u32 height; /* active height */ u32 xres; /* Display panel width */ @@ -35,13 +35,13 @@ struct intf_timing_params { bool wide_bus_en; }; -struct intf_prog_fetch { +struct dpu_hw_intf_prog_fetch { u8 enable; /* vsync counter for the front porch pixel line */ u32 fetch_start; }; -struct intf_status { +struct dpu_hw_intf_status { u8 is_en; /* interface timing engine is enabled or not */ u8 is_prog_fetch_en; /* interface prog fetch counter is enabled or not */ u32 frame_count; /* frame count since timing engine enabled */ @@ -74,17 +74,17 @@ struct intf_status { */ struct dpu_hw_intf_ops { void (*setup_timing_gen)(struct dpu_hw_intf *intf, - const struct intf_timing_params *p, + const struct dpu_hw_intf_timing_params *p, const struct dpu_format *fmt); void (*setup_prg_fetch)(struct dpu_hw_intf *intf, - const struct intf_prog_fetch *fetch); + const struct dpu_hw_intf_prog_fetch *fetch); void (*enable_timing)(struct dpu_hw_intf *intf, u8 enable); void (*get_status)(struct dpu_hw_intf *intf, - struct intf_status *status); + struct dpu_hw_intf_status *status); u32 (*get_line_count)(struct dpu_hw_intf *intf);