From: Andrey Tretyakov <andrey.tretyakov@mail.com>
Date: Tue, 2 Aug 2022 18:59:52 +0000 (+0300)
Subject: [SPIRV] Fix style of LIT tests and remove metadata
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4bd9d98bc2be3548418dc67accc662cbeb10a2e1;p=platform%2Fupstream%2Fllvm.git

[SPIRV] Fix style of LIT tests and remove metadata

Fix style, indentation, comments of LIT tests
and remove unnecessary metadata and attributes.

Differential Revision: https://reviews.llvm.org/D130664
---

diff --git a/llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll b/llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
index 55b6a98..8d12414 100644
--- a/llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
+++ b/llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
@@ -1,30 +1,27 @@
 ; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
 
-; CHECK-SPIRV: %[[#Int:]] = OpTypeInt 32 0
-; CHECK-SPIRV-DAG: %[[#MemScope_Device:]] = OpConstant %[[#Int]] 1
-; CHECK-SPIRV-DAG: %[[#MemSemEqual_SeqCst:]] = OpConstant %[[#Int]] 16
-; CHECK-SPIRV-DAG: %[[#MemSemUnequal_Acquire:]] = OpConstant %[[#Int]] 2
-; CHECK-SPIRV-DAG: %[[#Constant_456:]] = OpConstant %[[#Int]] 456
-; CHECK-SPIRV-DAG: %[[#Constant_128:]] = OpConstant %[[#Int]] 128
-; CHECK-SPIRV-DAG: %[[#Bool:]] = OpTypeBool
-; CHECK-SPIRV-DAG: %[[#Struct:]] = OpTypeStruct %[[#Int]] %[[#Bool]]
-; CHECK-SPIRV-DAG: %[[#UndefStruct:]] = OpUndef %[[#Struct]]
-
-; CHECK-SPIRV: %[[#Pointer:]] = OpFunctionParameter %[[#]]
-; CHECK-SPIRV: %[[#Value_ptr:]] = OpFunctionParameter %[[#]]
-; CHECK-SPIRV: %[[#Comparator:]] = OpFunctionParameter %[[#]]
-
-; CHECK-SPIRV: %[[#Value:]] = OpLoad %[[#Int]] %[[#Value_ptr]]
-; CHECK-SPIRV: %[[#Res:]] = OpAtomicCompareExchange %[[#Int]] %[[#Pointer]] %[[#MemScope_Device]]
-; CHECK-SPIRV-SAME:                  %[[#MemSemEqual_SeqCst]] %[[#MemSemUnequal_Acquire]] %[[#Value]] %[[#Comparator]]
-; CHECK-SPIRV: %[[#Success:]] = OpIEqual %[[#]] %[[#Res]] %[[#Comparator]]
-; CHECK-SPIRV: %[[#Composite_0:]] = OpCompositeInsert %[[#Struct]] %[[#Res]] %[[#UndefStruct]] 0
-; CHECK-SPIRV: %[[#Composite_1:]] = OpCompositeInsert %[[#Struct]] %[[#Success]] %[[#Composite_0]] 1
-; CHECK-SPIRV: %[[#]] = OpCompositeExtract %[[#Bool]] %[[#Composite_1]] 1
-
-target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-
-; Function Attrs: nounwind
+; CHECK-SPIRV:      %[[#Int:]] = OpTypeInt 32 0
+; CHECK-SPIRV-DAG:  %[[#MemScope_Device:]] = OpConstant %[[#Int]] 1
+; CHECK-SPIRV-DAG:  %[[#MemSemEqual_SeqCst:]] = OpConstant %[[#Int]] 16
+; CHECK-SPIRV-DAG:  %[[#MemSemUnequal_Acquire:]] = OpConstant %[[#Int]] 2
+; CHECK-SPIRV-DAG:  %[[#Constant_456:]] = OpConstant %[[#Int]] 456
+; CHECK-SPIRV-DAG:  %[[#Constant_128:]] = OpConstant %[[#Int]] 128
+; CHECK-SPIRV-DAG:  %[[#Bool:]] = OpTypeBool
+; CHECK-SPIRV-DAG:  %[[#Struct:]] = OpTypeStruct %[[#Int]] %[[#Bool]]
+; CHECK-SPIRV-DAG:  %[[#UndefStruct:]] = OpUndef %[[#Struct]]
+
+; CHECK-SPIRV:      %[[#Pointer:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#Value_ptr:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#Comparator:]] = OpFunctionParameter %[[#]]
+
+; CHECK-SPIRV:      %[[#Value:]] = OpLoad %[[#Int]] %[[#Value_ptr]]
+; CHECK-SPIRV:      %[[#Res:]] = OpAtomicCompareExchange %[[#Int]] %[[#Pointer]] %[[#MemScope_Device]]
+; CHECK-SPIRV-SAME: %[[#MemSemEqual_SeqCst]] %[[#MemSemUnequal_Acquire]] %[[#Value]] %[[#Comparator]]
+; CHECK-SPIRV:      %[[#Success:]] = OpIEqual %[[#]] %[[#Res]] %[[#Comparator]]
+; CHECK-SPIRV:      %[[#Composite_0:]] = OpCompositeInsert %[[#Struct]] %[[#Res]] %[[#UndefStruct]] 0
+; CHECK-SPIRV:      %[[#Composite_1:]] = OpCompositeInsert %[[#Struct]] %[[#Success]] %[[#Composite_0]] 1
+; CHECK-SPIRV:      %[[#]] = OpCompositeExtract %[[#Bool]] %[[#Composite_1]] 1
+
 define dso_local spir_func void @test(i32* %ptr, i32* %value_ptr, i32 %comparator) local_unnamed_addr {
 entry:
   %0 = load i32, i32* %value_ptr, align 4
@@ -41,17 +38,16 @@ cmpxchg.continue:                                 ; preds = %cmpxchg.store_expec
   ret void
 }
 
-; CHECK-SPIRV: %[[#Ptr:]] = OpFunctionParameter %[[#]]
-; CHECK-SPIRV: %[[#Store_ptr:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#Ptr:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#Store_ptr:]] = OpFunctionParameter %[[#]]
 
-; CHECK-SPIRV: %[[#Res_1:]] = OpAtomicCompareExchange %[[#Int]] %[[#Ptr]] %[[#MemScope_Device]]
-; CHECK-SPIRV-SAME:                  %[[#MemSemEqual_SeqCst]] %[[#MemSemUnequal_Acquire]] %[[#Constant_456]] %[[#Constant_128]]
-; CHECK-SPIRV: %[[#Success_1:]] = OpIEqual %[[#]] %[[#Res_1]] %[[#Constant_128]]
-; CHECK-SPIRV: %[[#Composite:]] = OpCompositeInsert %[[#Struct]] %[[#Res_1]] %[[#UndefStruct]] 0
-; CHECK-SPIRV: %[[#Composite_1:]] = OpCompositeInsert %[[#Struct]] %[[#Success_1]] %[[#Composite]] 1
-; CHECK-SPIRV: OpStore %[[#Store_ptr]] %[[#Composite_1]]
+; CHECK-SPIRV:      %[[#Res_1:]] = OpAtomicCompareExchange %[[#Int]] %[[#Ptr]] %[[#MemScope_Device]]
+; CHECK-SPIRV-SAME: %[[#MemSemEqual_SeqCst]] %[[#MemSemUnequal_Acquire]] %[[#Constant_456]] %[[#Constant_128]]
+; CHECK-SPIRV:      %[[#Success_1:]] = OpIEqual %[[#]] %[[#Res_1]] %[[#Constant_128]]
+; CHECK-SPIRV:      %[[#Composite:]] = OpCompositeInsert %[[#Struct]] %[[#Res_1]] %[[#UndefStruct]] 0
+; CHECK-SPIRV:      %[[#Composite_1:]] = OpCompositeInsert %[[#Struct]] %[[#Success_1]] %[[#Composite]] 1
+; CHECK-SPIRV:      OpStore %[[#Store_ptr]] %[[#Composite_1]]
 
-; Function Attrs: nounwind
 define dso_local spir_func void @test2(i32* %ptr, {i32, i1}* %store_ptr) local_unnamed_addr {
 entry:
   %0 = cmpxchg i32* %ptr, i32 128, i32 456 seq_cst acquire
diff --git a/llvm/test/CodeGen/SPIRV/TruncToBool.ll b/llvm/test/CodeGen/SPIRV/TruncToBool.ll
index 85bd650..6682c23 100644
--- a/llvm/test/CodeGen/SPIRV/TruncToBool.ll
+++ b/llvm/test/CodeGen/SPIRV/TruncToBool.ll
@@ -3,7 +3,6 @@
 ; CHECK-SPIRV:      OpBitwiseAnd
 ; CHECK-SPIRV-NEXT: OpINotEqual
 
-; Function Attrs: nounwind
 define spir_kernel void @test(i32 %op1, i32 %op2, i8 %op3) {
 entry:
   %0 = trunc i8 %op3 to i1
@@ -11,5 +10,4 @@ entry:
   ret void
 }
 
-; Function Attrs: nounwind readnone
 declare spir_func i32 @_Z14__spirv_Selectbii(i1 zeroext, i32, i32)
diff --git a/llvm/test/CodeGen/SPIRV/branching/if-merging.ll b/llvm/test/CodeGen/SPIRV/branching/if-merging.ll
index e112982..43c0d65 100644
--- a/llvm/test/CodeGen/SPIRV/branching/if-merging.ll
+++ b/llvm/test/CodeGen/SPIRV/branching/if-merging.ll
@@ -1,8 +1,6 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-; NOTE: This does not check for structured control-flow operations.
-
-target triple = "spirv32-unknown-unknown"
+;; NOTE: This does not check for structured control-flow operations.
 
 ; CHECK-DAG: OpName [[FOO:%.+]] "foo"
 ; CHECK-DAG: OpName [[BAR:%.+]] "bar"
diff --git a/llvm/test/CodeGen/SPIRV/constant/global-constants.ll b/llvm/test/CodeGen/SPIRV/constant/global-constants.ll
index 460bc60..916c706 100644
--- a/llvm/test/CodeGen/SPIRV/constant/global-constants.ll
+++ b/llvm/test/CodeGen/SPIRV/constant/global-constants.ll
@@ -19,7 +19,7 @@ define i32 @getGlobal3() {
   ret i32 %g
 }
 
-; CHECK: [[INT:%.+]] = OpTypeInt 32
+; CHECK:     [[INT:%.+]] = OpTypeInt 32
 
 ; CHECK-DAG: [[PTR_TO_INT_AS1:%.+]] = OpTypePointer CrossWorkgroup [[INT]]
 ; CHECK-DAG: [[PTR_TO_INT_AS2:%.+]] = OpTypePointer UniformConstant [[INT]]
@@ -33,6 +33,6 @@ define i32 @getGlobal3() {
 ; CHECK-DAG: [[GV2:%.+]] = OpVariable [[PTR_TO_INT_AS2]] UniformConstant [[CST_AS2]]
 ; CHECK-DAG: [[GV3:%.+]] = OpVariable [[PTR_TO_INT_AS3]] Workgroup [[CST_AS3]]
 
-; CHECK: OpLoad [[INT]] [[GV1]]
-; CHECK: OpLoad [[INT]] [[GV2]]
-; CHECK: OpLoad [[INT]] [[GV3]]
+; CHECK:     OpLoad [[INT]] [[GV1]]
+; CHECK:     OpLoad [[INT]] [[GV2]]
+; CHECK:     OpLoad [[INT]] [[GV3]]
diff --git a/llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll b/llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
index d3bf38e..355bd32 100644
--- a/llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
+++ b/llvm/test/CodeGen/SPIRV/constant/local-aggregate-constant.ll
@@ -6,7 +6,7 @@ define %aggregate @getConstant() {
   ret %aggregate { i8 1, i32 2 }
 }
 
-; CHECK: OpName [[GET:%.+]] "getConstant"
+; CHECK:     OpName [[GET:%.+]] "getConstant"
 
 ; CHECK-DAG: [[I8:%.+]] = OpTypeInt 8
 ; CHECK-DAG: [[I32:%.+]] = OpTypeInt 32
@@ -15,6 +15,6 @@ define %aggregate @getConstant() {
 ; CHECK-DAG: [[CST_I32:%.+]] = OpConstant [[I32]] 2
 ; CHECK-DAG: [[CST_AGGREGATE:%.+]] = OpConstantComposite [[AGGREGATE]] [[CST_I8]] [[CST_I32]]
 
-; CHECK: [[GET]] = OpFunction [[AGGREGATE]]
-; CHECK: OpReturnValue [[CST_AGGREGATE]]
-; CHECK: OpFunctionEnd
+; CHECK:     [[GET]] = OpFunction [[AGGREGATE]]
+; CHECK:     OpReturnValue [[CST_AGGREGATE]]
+; CHECK:     OpFunctionEnd
diff --git a/llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll b/llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
index 86b286d..73312c1 100644
--- a/llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
+++ b/llvm/test/CodeGen/SPIRV/constant/local-bool-constants.ll
@@ -8,10 +8,10 @@ define i1 @getConstantFalse() {
   ret i1 false
 }
 
-; CHECK: [[BOOL:%.+]] = OpTypeBool
+; CHECK:     [[BOOL:%.+]] = OpTypeBool
 ; CHECK-DAG: [[FN:%.+]] = OpTypeFunction [[BOOL]]
 ; CHECK-DAG: [[TRUE:%.+]] = OpConstantTrue
 ; CHECK-DAG: [[FALSE:%.+]] = OpConstantFalse
 
-; CHECK: OpFunction [[BOOL]] None [[FN]]
-; CHECK: OpFunction [[BOOL]] None [[FN]]
+; CHECK:     OpFunction [[BOOL]] None [[FN]]
+; CHECK:     OpFunction [[BOOL]] None [[FN]]
diff --git a/llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll b/llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
index 809d917..3693038 100644
--- a/llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
+++ b/llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll
@@ -1,21 +1,21 @@
 ; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-; OpenCL global memory
+;; OpenCL global memory
 define i32 addrspace(1)* @getConstant1() {
   ret i32 addrspace(1)* null
 }
 
-; OpenCL constant memory
+;; OpenCL constant memory
 define i32 addrspace(2)* @getConstant2() {
   ret i32 addrspace(2)* null
 }
 
-; OpenCL local memory
+;; OpenCL local memory
 define i32 addrspace(3)* @getConstant3() {
   ret i32 addrspace(3)* null
 }
 
-; CHECK: [[INT:%.+]] = OpTypeInt 32
+; CHECK:     [[INT:%.+]] = OpTypeInt 32
 
 ; CHECK-DAG: [[PTR_AS1:%.+]] = OpTypePointer CrossWorkgroup [[INT]]
 ; CHECK-DAG: OpConstantNull [[PTR_AS1]]
diff --git a/llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll b/llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
index 176518b..0e35588 100644
--- a/llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
+++ b/llvm/test/CodeGen/SPIRV/constant/local-vector-matrix-constants.ll
@@ -1,6 +1,6 @@
 ; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-; TODO: Add test for matrix. But how are they represented in LLVM IR?
+;; TODO: Add test for matrix. But how are they represented in LLVM IR?
 
 define <4 x i8> @getVectorConstant() {
   ret <4 x i8> <i8 1, i8 1, i8 1, i8 1>
diff --git a/llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll b/llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
index 3fb8301..f640c88 100644
--- a/llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
+++ b/llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
@@ -1,12 +1,10 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[BAR:%.+]] "bar"
 ; CHECK-DAG: OpName [[FOO:%.+]] "foo"
 ; CHECK-DAG: OpName [[GOO:%.+]] "goo"
 
-; CHECK: [[INT:%.+]] = OpTypeInt 32
+; CHECK:     [[INT:%.+]] = OpTypeInt 32
 ; CHECK-DAG: [[STACK_PTR:%.+]] = OpTypePointer Function [[INT]]
 ; CHECK-DAG: [[GLOBAL_PTR:%.+]] = OpTypePointer CrossWorkgroup [[INT]]
 ; CHECK-DAG: [[FN1:%.+]] = OpTypeFunction [[INT]] [[INT]]
@@ -46,7 +44,7 @@ define i32 @foo(i32 %a) {
 ; CHECK: OpFunctionEnd
 
 
-; Test load and store in global address space.
+;; Test load and store in global address space.
 define i32 @goo(i32 %a, i32 addrspace(1)* %p) {
   store i32 %a, i32 addrspace(1)* %p
   %b = load i32, i32 addrspace(1)* %p
diff --git a/llvm/test/CodeGen/SPIRV/function/identity-function.ll b/llvm/test/CodeGen/SPIRV/function/identity-function.ll
index ebf1fff..0446544 100644
--- a/llvm/test/CodeGen/SPIRV/function/identity-function.ll
+++ b/llvm/test/CodeGen/SPIRV/function/identity-function.ll
@@ -1,14 +1,12 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-target triple = "spirv32-unknown-unknown"
+; CHECK-DAG:  OpName [[VALUE:%.+]] "value"
+; CHECK-DAG:  OpName [[IDENTITY:%.+]] "identity"
 
-; CHECK-DAG: OpName [[VALUE:%.+]] "value"
-; CHECK-DAG: OpName [[IDENTITY:%.+]] "identity"
+; CHECK:      [[INT:%.+]] = OpTypeInt 32
+; CHECK:      [[FN:%.+]] = OpTypeFunction [[INT]] [[INT]]
 
-; CHECK: [[INT:%.+]] = OpTypeInt 32
-; CHECK: [[FN:%.+]] = OpTypeFunction [[INT]] [[INT]]
-
-; CHECK: [[IDENTITY]] = OpFunction [[INT]] None [[FN]]
+; CHECK:      [[IDENTITY]] = OpFunction [[INT]] None [[FN]]
 ; CHECK-NEXT: [[VALUE]] = OpFunctionParameter [[INT]]
 ; CHECK-NEXT: {{%.+}} = OpLabel
 ; CHECK-NEXT: OpReturnValue [[VALUE]]
diff --git a/llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll b/llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
index 488ec3f..675bf23 100644
--- a/llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
+++ b/llvm/test/CodeGen/SPIRV/function/trivial-function-definition.ll
@@ -1,27 +1,25 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-target triple = "spirv32-unknown-unknown"
+;; Debug info:
+; CHECK:     OpName [[FOO:%.+]] "foo"
 
-; Debug info:
-; CHECK: OpName [[FOO:%.+]] "foo"
+;; Types:
+; CHECK:     [[VOID:%.+]] = OpTypeVoid
+; CHECK:     [[FN:%.+]] = OpTypeFunction [[VOID]]
 
-; Types:
-; CHECK: [[VOID:%.+]] = OpTypeVoid
-; CHECK: [[FN:%.+]] = OpTypeFunction [[VOID]]
-
-; Functions:
-; CHECK: [[FOO]] = OpFunction [[VOID]] None [[FN]]
+;; Functions:
+; CHECK:     [[FOO]] = OpFunction [[VOID]] None [[FN]]
 ; CHECK-NOT: OpFunctionParameter
-; NOTE: In 2.4, it isn't explicitly written that a function always has a least
-;       one block. In fact, 2.4.11 seems to imply that there are at least two
-;       blocks in functions with a body, but that doesn't make much sense.
-;       However, in order to distinguish between function declaration and
-;       definition, a function needs at least one block, hence why this test
-;       expects one OpLabel + OpReturn.
-; CHECK: OpLabel
-; CHECK: OpReturn
+;; NOTE: In 2.4, it isn't explicitly written that a function always has a least
+;;       one block. In fact, 2.4.11 seems to imply that there are at least two
+;;       blocks in functions with a body, but that doesn't make much sense.
+;;       However, in order to distinguish between function declaration and
+;;       definition, a function needs at least one block, hence why this test
+;;       expects one OpLabel + OpReturn.
+; CHECK:     OpLabel
+; CHECK:     OpReturn
 ; CHECK-NOT: OpLabel
-; CHECK: OpFunctionEnd
+; CHECK:     OpFunctionEnd
 define void @foo() {
   ret void
 }
diff --git a/llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll b/llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
index 66b273d..97ee6ab 100644
--- a/llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
+++ b/llvm/test/CodeGen/SPIRV/function/trivial-function-with-attributes.ll
@@ -1,10 +1,8 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-target triple = "spirv32-unknown-unknown"
+;; FIXME: Are there any attributes that would make the IR invalid for SPIR-V?
 
-; FIXME: Are there any attributes that would make the IR invalid for SPIR-V?
-
-; Names:
+;; Names:
 ; CHECK-DAG: OpName [[FN1:%.+]] "fn1"
 ; CHECK-DAG: OpName [[FN2:%.+]] "fn2"
 ; CHECK-DAG: OpName [[FN3:%.+]] "fn3"
@@ -13,19 +11,19 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[FN6:%.+]] "fn6"
 ; CHECK-DAG: OpName [[FN7:%.+]] "fn7"
 
-; Types:
-; CHECK: [[VOID:%.+]] = OpTypeVoid
-; CHECK: [[FN:%.+]] = OpTypeFunction [[VOID]]
+;; Types:
+; CHECK:     [[VOID:%.+]] = OpTypeVoid
+; CHECK:     [[FN:%.+]] = OpTypeFunction [[VOID]]
 
 
-; Functions:
+;; Functions:
 
 define void @fn1() noinline {
   ret void
 }
-; CHECK: [[FN1]] = OpFunction [[VOID]] DontInline [[FN]]
+; CHECK:     [[FN1]] = OpFunction [[VOID]] DontInline [[FN]]
 ; CHECK-NOT: OpFunctionParameter
-; CHECK: OpFunctionEnd
+; CHECK:     OpFunctionEnd
 
 
 attributes #0 = { noinline }
diff --git a/llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll b/llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
index fbff919..8437e69 100644
--- a/llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
+++ b/llvm/test/CodeGen/SPIRV/function/trivial-function-with-call.ll
@@ -1,29 +1,27 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-target triple = "spirv32-unknown-unknown"
+;; Debug info:
+; CHECK:      OpName [[FOO:%.+]] "foo"
+; CHECK:      OpName [[BAR:%.+]] "bar"
 
-; Debug info:
-; CHECK: OpName [[FOO:%.+]] "foo"
-; CHECK: OpName [[BAR:%.+]] "bar"
-
-; Types:
-; CHECK-DAG: [[I32:%.+]] = OpTypeInt 32
-; CHECK-DAG: [[VOID:%.+]] = OpTypeVoid
-; CHECK-DAG: [[FNVOID:%.+]] = OpTypeFunction [[VOID]] [[I32]]
-; CHECK-DAG: [[FNI32:%.+]] = OpTypeFunction [[I32]] [[I32]]
-; Function decl:
-; CHECK: [[BAR]] = OpFunction [[I32]] None [[FNI32]]
+;; Types:
+; CHECK-DAG:  [[I32:%.+]] = OpTypeInt 32
+; CHECK-DAG:  [[VOID:%.+]] = OpTypeVoid
+; CHECK-DAG:  [[FNVOID:%.+]] = OpTypeFunction [[VOID]] [[I32]]
+; CHECK-DAG:  [[FNI32:%.+]] = OpTypeFunction [[I32]] [[I32]]
+;; Function decl:
+; CHECK:      [[BAR]] = OpFunction [[I32]] None [[FNI32]]
 ; CHECK-NEXT: OpFunctionParameter [[I32]]
 ; CHECK-NEXT: OpFunctionEnd
 declare i32 @bar(i32 %x)
-; Function def:
-; CHECK: [[FOO]] = OpFunction [[VOID]] None [[FNVOID]]
-; CHECK: OpFunctionParameter
-; CHECK: OpLabel
-; CHECK: OpFunctionCall [[I32]] [[BAR]]
-; CHECK: OpReturn
-; CHECK-NOT: OpLabel
-; CHECK: OpFunctionEnd
+;; Function def:
+; CHECK:      [[FOO]] = OpFunction [[VOID]] None [[FNVOID]]
+; CHECK:      OpFunctionParameter
+; CHECK:      OpLabel
+; CHECK:      OpFunctionCall [[I32]] [[BAR]]
+; CHECK:      OpReturn
+; CHECK-NOT:  OpLabel
+; CHECK:      OpFunctionEnd
 define spir_func void @foo(i32 %x) {
   %call1 = call spir_func i32 @bar(i32 %x)
   ret void
diff --git a/llvm/test/CodeGen/SPIRV/instructions/atomic.ll b/llvm/test/CodeGen/SPIRV/instructions/atomic.ll
index 90603b4..f53facf 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/atomic.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/atomic.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[ADD:%.*]] "test_add"
 ; CHECK-DAG: OpName [[SUB:%.*]] "test_sub"
@@ -13,12 +11,12 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[XOR:%.*]] "test_xor"
 
 ; CHECK-DAG: [[I32Ty:%.*]] = OpTypeInt 32 0
-; Device scope is encoded with constant 1
+;; Device scope is encoded with constant 1
 ; CHECK-DAG: [[SCOPE:%.*]] = OpConstant [[I32Ty]] 1
-; "monotonic" maps to the relaxed memory semantics, encoded with constant 0
+;; "monotonic" maps to the relaxed memory semantics, encoded with constant 0
 ; CHECK-DAG: [[RELAXED:%.*]] = OpConstantNull [[I32Ty]]
 
-; CHECK: [[ADD]] = OpFunction [[I32Ty]]
+; CHECK:      [[ADD]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -30,7 +28,7 @@ define i32 @test_add(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[SUB]] = OpFunction [[I32Ty]]
+; CHECK:      [[SUB]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -42,7 +40,7 @@ define i32 @test_sub(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[MIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -54,7 +52,7 @@ define i32 @test_min(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[MAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -66,7 +64,7 @@ define i32 @test_max(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -78,7 +76,7 @@ define i32 @test_umin(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -90,7 +88,7 @@ define i32 @test_umax(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[AND]] = OpFunction [[I32Ty]]
+; CHECK:      [[AND]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -102,7 +100,7 @@ define i32 @test_and(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[OR]] = OpFunction [[I32Ty]]
+; CHECK:      [[OR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -114,7 +112,7 @@ define i32 @test_or(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[XOR]] = OpFunction [[I32Ty]]
+; CHECK:      [[XOR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll b/llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
index e758117..014a6e4 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/atomic_acqrel.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[ADD:%.*]] "test_add"
 ; CHECK-DAG: OpName [[SUB:%.*]] "test_sub"
@@ -13,12 +11,12 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[XOR:%.*]] "test_xor"
 
 ; CHECK-DAG: [[I32Ty:%.*]] = OpTypeInt 32 0
-; Device scope is encoded with constant 1
+;; Device scope is encoded with constant 1
 ; CHECK-DAG: [[SCOPE:%.*]] = OpConstant [[I32Ty]] 1
-; "acq_rel" maps to the constant 8
+;; "acq_rel" maps to the constant 8
 ; CHECK-DAG: [[ACQREL:%.*]] = OpConstant [[I32Ty]] 8
 
-; CHECK: [[ADD]] = OpFunction [[I32Ty]]
+; CHECK:      [[ADD]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -30,7 +28,7 @@ define i32 @test_add(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[SUB]] = OpFunction [[I32Ty]]
+; CHECK:      [[SUB]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -42,7 +40,7 @@ define i32 @test_sub(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[MIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -54,7 +52,7 @@ define i32 @test_min(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[MAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -66,7 +64,7 @@ define i32 @test_max(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -78,7 +76,7 @@ define i32 @test_umin(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -90,7 +88,7 @@ define i32 @test_umax(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[AND]] = OpFunction [[I32Ty]]
+; CHECK:      [[AND]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -102,7 +100,7 @@ define i32 @test_and(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[OR]] = OpFunction [[I32Ty]]
+; CHECK:      [[OR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -114,7 +112,7 @@ define i32 @test_or(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[XOR]] = OpFunction [[I32Ty]]
+; CHECK:      [[XOR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll b/llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
index 7ad22d8..09f000b 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/atomic_seq.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[ADD:%.*]] "test_add"
 ; CHECK-DAG: OpName [[SUB:%.*]] "test_sub"
@@ -13,12 +11,12 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[XOR:%.*]] "test_xor"
 
 ; CHECK-DAG: [[I32Ty:%.*]] = OpTypeInt 32 0
-; Device scope is encoded with constant 1
+;; Device scope is encoded with constant 1
 ; CHECK-DAG: [[SCOPE:%.*]] = OpConstant [[I32Ty]] 1
-; "sequentially consistent" maps to constant 16
+;; "sequentially consistent" maps to constant 16
 ; CHECK-DAG: [[SEQ:%.*]] = OpConstant [[I32Ty]] 16
 
-; CHECK: [[ADD]] = OpFunction [[I32Ty]]
+; CHECK:      [[ADD]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -30,7 +28,7 @@ define i32 @test_add(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[SUB]] = OpFunction [[I32Ty]]
+; CHECK:      [[SUB]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -42,7 +40,7 @@ define i32 @test_sub(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[MIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -54,7 +52,7 @@ define i32 @test_min(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[MAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[MAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -66,7 +64,7 @@ define i32 @test_max(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMIN]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMIN]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -78,7 +76,7 @@ define i32 @test_umin(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[UMAX]] = OpFunction [[I32Ty]]
+; CHECK:      [[UMAX]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -90,7 +88,7 @@ define i32 @test_umax(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[AND]] = OpFunction [[I32Ty]]
+; CHECK:      [[AND]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -102,7 +100,7 @@ define i32 @test_and(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[OR]] = OpFunction [[I32Ty]]
+; CHECK:      [[OR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -114,7 +112,7 @@ define i32 @test_or(i32* %ptr, i32 %val) {
   ret i32 %r
 }
 
-; CHECK: [[XOR]] = OpFunction [[I32Ty]]
+; CHECK:      [[XOR]] = OpFunction [[I32Ty]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll b/llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
index 2cefdef..a5b40b2 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/call-complex-function.ll
@@ -13,15 +13,15 @@
 ; CHECK-DAG: [[PAIR:%.+]] = OpTypeStruct [[I32]] [[I16]]
 ; CHECK-DAG: [[FN1:%.+]] = OpTypeFunction [[I32]] [[I32]]
 ; CHECK-DAG: [[FN2:%.+]] = OpTypeFunction [[I32]] [[PAIR]] [[I64]]
-; According to the Specification, the OpUndef can be defined in Function.
-; But the Specification also recommends defining it here. So we enforce that.
+;; According to the Specification, the OpUndef can be defined in Function.
+;; But the Specification also recommends defining it here. So we enforce that.
 ; CHECK-DAG: [[UNDEF:%.+]] = OpUndef [[PAIR]]
 
 
 declare i32 @fun(i32 %value)
 
-; Check for @fun declaration
-; CHECK: [[FUN]] = OpFunction [[I32]] None [[FN1]]
+;; Check for @fun declaration
+; CHECK:      [[FUN]] = OpFunction [[I32]] None [[FN1]]
 ; CHECK-NEXT: OpFunctionParameter [[I32]]
 ; CHECK-NEXT: OpFunctionEnd
 
@@ -32,23 +32,23 @@ define i32 @foo({i32, i16} %in, i64 %unused) {
   ret i32 %bar
 }
 
-; CHECK: [[GOO]] = OpFunction [[I32]] None [[FN3]]
+; CHECK:      [[GOO]] = OpFunction [[I32]] None [[FN3]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[I32]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[I16]]
 ; CHECK-NEXT: [[C:%.+]] = OpFunctionParameter [[I64]]
-; CHECK: [[AGG1:%.+]] = OpCompositeInsert [[PAIR]] [[A]] [[UNDEF]] 0
-; CHECK: [[AGG2:%.+]] = OpCompositeInsert [[PAIR]] [[B]] [[AGG1]] 1
-; CHECK: [[RET:%.+]] = OpFunctionCall [[I32]] [[FOO]] [[AGG2]] [[C]]
-; CHECK: OpReturnValue [[RET]]
-; CHECK: OpFunctionEnd
+; CHECK:      [[AGG1:%.+]] = OpCompositeInsert [[PAIR]] [[A]] [[UNDEF]] 0
+; CHECK:      [[AGG2:%.+]] = OpCompositeInsert [[PAIR]] [[B]] [[AGG1]] 1
+; CHECK:      [[RET:%.+]] = OpFunctionCall [[I32]] [[FOO]] [[AGG2]] [[C]]
+; CHECK:      OpReturnValue [[RET]]
+; CHECK:      OpFunctionEnd
 
-; CHECK: [[FOO]] = OpFunction [[I32]] None [[FN2]]
+; CHECK:      [[FOO]] = OpFunction [[I32]] None [[FN2]]
 ; CHECK-NEXT: [[IN:%.+]] = OpFunctionParameter [[PAIR]]
 ; CHECK-NEXT: OpFunctionParameter [[I64]]
-; CHECK: [[FIRST:%.+]] = OpCompositeExtract [[I32]] [[IN]] 0
-; CHECK: [[BAR:%.+]] = OpFunctionCall [[I32]] [[FUN]] [[FIRST]]
-; CHECK: OpReturnValue [[BAR]]
-; CHECK: OpFunctionEnd
+; CHECK:      [[FIRST:%.+]] = OpCompositeExtract [[I32]] [[IN]] 0
+; CHECK:      [[BAR:%.+]] = OpFunctionCall [[I32]] [[FUN]] [[FIRST]]
+; CHECK:      OpReturnValue [[BAR]]
+; CHECK:      OpFunctionEnd
 
 define i32 @goo(i32 %a, i16 %b, i64 %c) {
   %agg1 = insertvalue {i32, i16} undef, i32 %a, 0
@@ -57,4 +57,4 @@ define i32 @goo(i32 %a, i16 %b, i64 %c) {
   ret i32 %ret
 }
 
-; TODO: test tailcall?
+;; TODO: test tailcall?
diff --git a/llvm/test/CodeGen/SPIRV/instructions/fcmp.ll b/llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
index 73ec5ca..d48ee0a 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/fcmp.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[UEQ:%.*]] "test_ueq"
 ; CHECK-DAG: OpName [[OEQ:%.*]] "test_oeq"
@@ -32,7 +30,7 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[v3UNO:%.*]] "test_v3_uno"
 ; CHECK-DAG: OpName [[v3ORD:%.*]] "test_v3_ord"
 
-; CHECK: [[UEQ]] = OpFunction
+; CHECK:      [[UEQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -44,7 +42,7 @@ define i1 @test_ueq(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[OEQ]] = OpFunction
+; CHECK:      [[OEQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -56,7 +54,7 @@ define i1 @test_oeq(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[UNE]] = OpFunction
+; CHECK:      [[UNE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -68,7 +66,7 @@ define i1 @test_une(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[ONE]] = OpFunction
+; CHECK:      [[ONE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -80,7 +78,7 @@ define i1 @test_one(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULT]] = OpFunction
+; CHECK:      [[ULT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -92,7 +90,7 @@ define i1 @test_ult(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[OLT]] = OpFunction
+; CHECK:      [[OLT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -104,7 +102,7 @@ define i1 @test_olt(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULE]] = OpFunction
+; CHECK:      [[ULE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -116,7 +114,7 @@ define i1 @test_ule(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[OLE]] = OpFunction
+; CHECK:      [[OLE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -128,7 +126,7 @@ define i1 @test_ole(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGT]] = OpFunction
+; CHECK:      [[UGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -140,7 +138,7 @@ define i1 @test_ugt(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[OGT]] = OpFunction
+; CHECK:      [[OGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -152,7 +150,7 @@ define i1 @test_ogt(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGE]] = OpFunction
+; CHECK:      [[UGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -164,7 +162,7 @@ define i1 @test_uge(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[OGE]] = OpFunction
+; CHECK:      [[OGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -176,7 +174,7 @@ define i1 @test_oge(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[ORD]] = OpFunction
+; CHECK:      [[ORD]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -188,7 +186,7 @@ define i1 @test_ord(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[UNO]] = OpFunction
+; CHECK:      [[UNO]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -200,7 +198,7 @@ define i1 @test_uno(float %a, float %b) {
   ret i1 %r
 }
 
-; CHECK: [[v3UEQ]] = OpFunction
+; CHECK:      [[v3UEQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -212,7 +210,7 @@ define <3 x i1> @test_v3_ueq(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3OEQ]] = OpFunction
+; CHECK:      [[v3OEQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -224,7 +222,7 @@ define <3 x i1> @test_v3_oeq(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UNE]] = OpFunction
+; CHECK:      [[v3UNE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -236,7 +234,7 @@ define <3 x i1> @test_v3_une(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ONE]] = OpFunction
+; CHECK:      [[v3ONE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -248,7 +246,7 @@ define <3 x i1> @test_v3_one(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ULT]] = OpFunction
+; CHECK:      [[v3ULT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -260,7 +258,7 @@ define <3 x i1> @test_v3_ult(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3OLT]] = OpFunction
+; CHECK:      [[v3OLT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -272,7 +270,7 @@ define <3 x i1> @test_v3_olt(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ULE]] = OpFunction
+; CHECK:      [[v3ULE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -284,7 +282,7 @@ define <3 x i1> @test_v3_ule(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3OLE]] = OpFunction
+; CHECK:      [[v3OLE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -296,7 +294,7 @@ define <3 x i1> @test_v3_ole(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UGT]] = OpFunction
+; CHECK:      [[v3UGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -308,7 +306,7 @@ define <3 x i1> @test_v3_ugt(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3OGT]] = OpFunction
+; CHECK:      [[v3OGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -320,7 +318,7 @@ define <3 x i1> @test_v3_ogt(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UGE]] = OpFunction
+; CHECK:      [[v3UGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -332,7 +330,7 @@ define <3 x i1> @test_v3_uge(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3OGE]] = OpFunction
+; CHECK:      [[v3OGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -344,7 +342,7 @@ define <3 x i1> @test_v3_oge(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ORD]] = OpFunction
+; CHECK:      [[v3ORD]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -356,7 +354,7 @@ define <3 x i1> @test_v3_ord(<3 x float> %a, <3 x float> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UNO]] = OpFunction
+; CHECK:      [[v3UNO]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/instructions/float-casts.ll b/llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
index bdf8284..ae28962 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/float-casts.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[TRUNC32_16:%.*]] "f32tof16"
 ; CHECK-DAG: OpName [[EXT16_32:%.*]] "f16tof32"
@@ -36,176 +34,176 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: [[U8v2:%.*]] = OpTypeVector [[U8]] 2
 
 
-; CHECK: [[TRUNC32_16]] = OpFunction [[F16]]
+; CHECK:      [[TRUNC32_16]] = OpFunction [[F16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpFConvert [[F16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpFConvert [[F16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define half @f32tof16(float %a) {
     %r = fptrunc float %a to half
     ret half %r
 }
 
-; CHECK: [[EXT16_32]] = OpFunction [[F32]]
+; CHECK:      [[EXT16_32]] = OpFunction [[F32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpFConvert [[F32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpFConvert [[F32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define float @f16tof32(half %a) {
   %r = fpext half %a to float
   ret float %r
 }
 
-; CHECK: [[TRUNC32_16v3]] = OpFunction [[F16v3]]
+; CHECK:      [[TRUNC32_16v3]] = OpFunction [[F16v3]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32v3]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpFConvert [[F16v3]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpFConvert [[F16v3]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <3 x half> @f32tof16v3(<3 x float> %a) {
     %r = fptrunc <3 x float> %a to <3 x half>
     ret <3 x half> %r
 }
 
-; CHECK: [[EXT16_32v3]] = OpFunction [[F32v3]]
+; CHECK:      [[EXT16_32v3]] = OpFunction [[F32v3]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16v3]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpFConvert [[F32v3]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpFConvert [[F32v3]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <3 x float> @f16tof32v3(<3 x half> %a) {
   %r = fpext <3 x half> %a to <3 x float>
   ret <3 x float> %r
 }
 
-; CHECK: [[F32toS32]] = OpFunction [[U32]]
+; CHECK:      [[F32toS32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @f32tos32(float %a) {
   %r = fptosi float %a to i32
   ret i32 %r
 }
 
-; CHECK: [[F32toS16]] = OpFunction [[U16]]
+; CHECK:      [[F32toS16]] = OpFunction [[U16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i16 @f32tos16(float %a) {
   %r = fptosi float %a to i16
   ret i16 %r
 }
 
-; CHECK: [[F32toS8]] = OpFunction [[U8]]
+; CHECK:      [[F32toS8]] = OpFunction [[U8]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U8]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U8]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i8 @f32tos8(float %a) {
   %r = fptosi float %a to i8
   ret i8 %r
 }
 
-; CHECK: [[F16toS32]] = OpFunction [[U32]]
+; CHECK:      [[F16toS32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @f16tos32(half %a) {
   %r = fptosi half %a to i32
   ret i32 %r
 }
 
-; CHECK: [[F16toS16]] = OpFunction [[U16]]
+; CHECK:      [[F16toS16]] = OpFunction [[U16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i16 @f16tos16(half %a) {
   %r = fptosi half %a to i16
   ret i16 %r
 }
 
-; CHECK: [[F16toS8]] = OpFunction [[U8]]
+; CHECK:      [[F16toS8]] = OpFunction [[U8]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToS [[U8]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToS [[U8]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i8 @f16tos8(half %a) {
   %r = fptosi half %a to i8
   ret i8 %r
 }
 
-; CHECK: [[F32toU32v2]] = OpFunction [[U32v2]]
+; CHECK:      [[F32toU32v2]] = OpFunction [[U32v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U32v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U32v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i32> @f32tou32v2(<2 x float> %a) {
   %r = fptoui <2 x float> %a to <2 x i32>
   ret <2 x i32> %r
 }
 
-; CHECK: [[F32toU16v2]] = OpFunction [[U16v2]]
+; CHECK:      [[F32toU16v2]] = OpFunction [[U16v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U16v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U16v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i16> @f32tou16v2(<2 x float> %a) {
   %r = fptoui <2 x float> %a to <2 x i16>
   ret <2 x i16> %r
 }
 
-; CHECK: [[F32toU8v2]] = OpFunction [[U8v2]]
+; CHECK:      [[F32toU8v2]] = OpFunction [[U8v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F32v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U8v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U8v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i8> @f32tou8v2(<2 x float> %a) {
   %r = fptoui <2 x float> %a to <2 x i8>
   ret <2 x i8> %r
 }
 
-; CHECK: [[F16toU32v2]] = OpFunction [[U32v2]]
+; CHECK:      [[F16toU32v2]] = OpFunction [[U32v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U32v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U32v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i32> @f16tou32v2(<2 x half> %a) {
   %r = fptoui <2 x half> %a to <2 x i32>
   ret <2 x i32> %r
 }
 
-; CHECK: [[F16toU16v2]] = OpFunction [[U16v2]]
+; CHECK:      [[F16toU16v2]] = OpFunction [[U16v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U16v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U16v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i16> @f16tou16v2(<2 x half> %a) {
   %r = fptoui <2 x half> %a to <2 x i16>
   ret <2 x i16> %r
 }
 
-; CHECK: [[F16toU8v2]] = OpFunction [[U8v2]]
+; CHECK:      [[F16toU8v2]] = OpFunction [[U8v2]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[F16v2]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpConvertFToU [[U8v2]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpConvertFToU [[U8v2]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i8> @f16tou8v2(<2 x half> %a) {
   %r = fptoui <2 x half> %a to <2 x i8>
diff --git a/llvm/test/CodeGen/SPIRV/instructions/icmp.ll b/llvm/test/CodeGen/SPIRV/instructions/icmp.ll
index 74f95e5..367b7ff 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/icmp.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/icmp.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[EQ:%.*]] "test_eq"
 ; CHECK-DAG: OpName [[NE:%.*]] "test_ne"
@@ -24,7 +22,7 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[v3UGE:%.*]] "test_v3_uge"
 ; CHECK-DAG: OpName [[v3SGE:%.*]] "test_v3_sge"
 
-; CHECK: [[EQ]] = OpFunction
+; CHECK:      [[EQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -36,7 +34,7 @@ define i1 @test_eq(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[NE]] = OpFunction
+; CHECK:      [[NE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -48,7 +46,7 @@ define i1 @test_ne(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[SLT]] = OpFunction
+; CHECK:      [[SLT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -60,7 +58,7 @@ define i1 @test_slt(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULT]] = OpFunction
+; CHECK:      [[ULT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -72,7 +70,7 @@ define i1 @test_ult(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULE]] = OpFunction
+; CHECK:      [[ULE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -84,7 +82,7 @@ define i1 @test_ule(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[SLE]] = OpFunction
+; CHECK:      [[SLE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -96,7 +94,7 @@ define i1 @test_sle(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGT]] = OpFunction
+; CHECK:      [[UGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -108,7 +106,7 @@ define i1 @test_ugt(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[SGT]] = OpFunction
+; CHECK:      [[SGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -120,7 +118,7 @@ define i1 @test_sgt(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGE]] = OpFunction
+; CHECK:      [[UGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -132,7 +130,7 @@ define i1 @test_uge(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[SGE]] = OpFunction
+; CHECK:      [[SGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -144,7 +142,7 @@ define i1 @test_sge(i32 %a, i32 %b) {
   ret i1 %r
 }
 
-; CHECK: [[v3EQ]] = OpFunction
+; CHECK:      [[v3EQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -156,7 +154,7 @@ define <3 x i1> @test_v3_eq(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3NE]] = OpFunction
+; CHECK:      [[v3NE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -168,7 +166,7 @@ define <3 x i1> @test_v3_ne(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3SLT]] = OpFunction
+; CHECK:      [[v3SLT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -180,7 +178,7 @@ define <3 x i1> @test_v3_slt(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ULT]] = OpFunction
+; CHECK:      [[v3ULT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -192,7 +190,7 @@ define <3 x i1> @test_v3_ult(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3ULE]] = OpFunction
+; CHECK:      [[v3ULE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -204,7 +202,7 @@ define <3 x i1> @test_v3_ule(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3SLE]] = OpFunction
+; CHECK:      [[v3SLE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -216,7 +214,7 @@ define <3 x i1> @test_v3_sle(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UGT]] = OpFunction
+; CHECK:      [[v3UGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -228,7 +226,7 @@ define <3 x i1> @test_v3_ugt(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3SGT]] = OpFunction
+; CHECK:      [[v3SGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -240,7 +238,7 @@ define <3 x i1> @test_v3_sgt(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3UGE]] = OpFunction
+; CHECK:      [[v3UGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -252,7 +250,7 @@ define <3 x i1> @test_v3_uge(<3 x i32> %a, <3 x i32> %b) {
   ret <3 x i1> %r
 }
 
-; CHECK: [[v3SGE]] = OpFunction
+; CHECK:      [[v3SGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
diff --git a/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll b/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
index bbc2e20..f91ec6e 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/integer-casts.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[TRUNC32_16:%.*]] "i32toi16"
 ; CHECK-DAG: OpName [[TRUNC32_8:%.*]] "i32toi8"
@@ -30,33 +28,33 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: [[U8v4:%.*]] = OpTypeVector [[U8]] 4
 
 
-; CHECK: [[TRUNC32_16]] = OpFunction [[U16]]
+; CHECK:      [[TRUNC32_16]] = OpFunction [[U16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i16 @i32toi16(i32 %a) {
     %r = trunc i32 %a to i16
     ret i16 %r
 }
 
-; CHECK: [[TRUNC32_8]] = OpFunction [[U8]]
+; CHECK:      [[TRUNC32_8]] = OpFunction [[U8]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U32]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U8]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U8]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i8 @i32toi8(i32 %a) {
     %r = trunc i32 %a to i8
     ret i8 %r
 }
 
-; CHECK: [[TRUNC16_8]] = OpFunction [[U8]]
+; CHECK:      [[TRUNC16_8]] = OpFunction [[U8]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U8]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U8]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i8 @i16toi8(i16 %a) {
     %r = trunc i16 %a to i8
@@ -64,99 +62,99 @@ define i8 @i16toi8(i16 %a) {
 }
 
 
-; CHECK: [[SEXT8_32]] = OpFunction [[U32]]
+; CHECK:      [[SEXT8_32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @s8tos32(i8 %a) {
   %r = sext i8 %a to i32
   ret i32 %r
 }
 
-; CHECK: [[SEXT8_16]] = OpFunction [[U16]]
+; CHECK:      [[SEXT8_16]] = OpFunction [[U16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i16 @s8tos16(i8 %a) {
   %r = sext i8 %a to i16
   ret i16 %r
 }
 
-; CHECK: [[SEXT16_32]] = OpFunction [[U32]]
+; CHECK:      [[SEXT16_32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @s16tos32(i16 %a) {
   %r = sext i16 %a to i32
   ret i32 %r
 }
 
-; CHECK: [[ZEXT8_32]] = OpFunction [[U32]]
+; CHECK:      [[ZEXT8_32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @u8tou32(i8 %a) {
   %r = zext i8 %a to i32
   ret i32 %r
 }
 
-; CHECK: [[ZEXT8_16]] = OpFunction [[U16]]
+; CHECK:      [[ZEXT8_16]] = OpFunction [[U16]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U16]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U16]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i16 @u8tou16(i8 %a) {
   %r = zext i8 %a to i16
   ret i16 %r
 }
 
-; CHECK: [[ZEXT16_32]] = OpFunction [[U32]]
+; CHECK:      [[ZEXT16_32]] = OpFunction [[U32]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U32]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U32]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @u16tou32(i16 %a) {
   %r = zext i16 %a to i32
   ret i32 %r
 }
 
-; CHECK: [[TRUNC32_16v4]] = OpFunction [[U16v4]]
+; CHECK:      [[TRUNC32_16v4]] = OpFunction [[U16v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U32v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U16v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U16v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i16> @i32toi16v4(<4 x i32> %a) {
     %r = trunc <4 x i32> %a to <4 x i16>
     ret <4 x i16> %r
 }
 
-; CHECK: [[TRUNC32_8v4]] = OpFunction [[U8v4]]
+; CHECK:      [[TRUNC32_8v4]] = OpFunction [[U8v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U32v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U8v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U8v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i8> @i32toi8v4(<4 x i32> %a) {
     %r = trunc <4 x i32> %a to <4 x i8>
     ret <4 x i8> %r
 }
 
-; CHECK: [[TRUNC16_8v4]] = OpFunction [[U8v4]]
+; CHECK:      [[TRUNC16_8v4]] = OpFunction [[U8v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U8v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U8v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i8> @i16toi8v4(<4 x i16> %a) {
     %r = trunc <4 x i16> %a to <4 x i8>
@@ -164,66 +162,66 @@ define <4 x i8> @i16toi8v4(<4 x i16> %a) {
 }
 
 
-; CHECK: [[SEXT8_32v4]] = OpFunction [[U32v4]]
+; CHECK:      [[SEXT8_32v4]] = OpFunction [[U32v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U32v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U32v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i32>  @s8tos32v4(<4 x i8> %a) {
   %r = sext <4 x i8> %a to <4 x i32>
   ret <4 x i32>  %r
 }
 
-; CHECK: [[SEXT8_16v4]] = OpFunction [[U16v4]]
+; CHECK:      [[SEXT8_16v4]] = OpFunction [[U16v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U16v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U16v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i16> @s8tos16v4(<4 x i8> %a) {
   %r = sext <4 x i8> %a to <4 x i16>
   ret <4 x i16> %r
 }
 
-; CHECK: [[SEXT16_32v4]] = OpFunction [[U32v4]]
+; CHECK:      [[SEXT16_32v4]] = OpFunction [[U32v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpSConvert [[U32v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpSConvert [[U32v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i32>  @s16tos32v4(<4 x i16> %a) {
   %r = sext <4 x i16> %a to <4 x i32>
   ret <4 x i32>  %r
 }
 
-; CHECK: [[ZEXT8_32v4]] = OpFunction [[U32v4]]
+; CHECK:      [[ZEXT8_32v4]] = OpFunction [[U32v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U32v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U32v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i32>  @u8tou32v4(<4 x i8> %a) {
   %r = zext <4 x i8> %a to <4 x i32>
   ret <4 x i32>  %r
 }
 
-; CHECK: [[ZEXT8_16v4]] = OpFunction [[U16v4]]
+; CHECK:      [[ZEXT8_16v4]] = OpFunction [[U16v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U8v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U16v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U16v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i16> @u8tou16v4(<4 x i8> %a) {
   %r = zext <4 x i8> %a to <4 x i16>
   ret <4 x i16> %r
 }
 
-; CHECK: [[ZEXT16_32v4]] = OpFunction [[U32v4]]
+; CHECK:      [[ZEXT16_32v4]] = OpFunction [[U32v4]]
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter [[U16v4]]
-; CHECK: OpLabel
-; CHECK: [[R:%.*]] = OpUConvert [[U32v4]] [[A]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.*]] = OpUConvert [[U32v4]] [[A]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <4 x i32>  @u16tou32v4(<4 x i16> %a) {
   %r = zext <4 x i16> %a to <4 x i32>
diff --git a/llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll b/llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll
index 55da211..4a9501b 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/ptrcmp.ll
@@ -1,6 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
-
-target triple = "spirv32-unknown-unknown"
+; RUN: llc -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
 ; CHECK-DAG: OpName [[EQ:%.*]] "test_eq"
 ; CHECK-DAG: OpName [[NE:%.*]] "test_ne"
@@ -13,8 +11,8 @@ target triple = "spirv32-unknown-unknown"
 ; CHECK-DAG: OpName [[UGE:%.*]] "test_uge"
 ; CHECK-DAG: OpName [[SGE:%.*]] "test_sge"
 
-; FIXME: Translator uses OpIEqual/OpINotEqual for test_eq/test_ne cases
-; CHECK: [[EQ]] = OpFunction
+;; FIXME: Translator uses OpIEqual/OpINotEqual for test_eq/test_ne cases
+; CHECK:      [[EQ]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -26,7 +24,7 @@ define i1 @test_eq(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[NE]] = OpFunction
+; CHECK:      [[NE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
@@ -38,13 +36,13 @@ define i1 @test_ne(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[SLT]] = OpFunction
+; CHECK:      [[SLT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpSLessThan {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpSLessThan {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_slt(i16* %a, i16* %b) {
@@ -52,13 +50,13 @@ define i1 @test_slt(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULT]] = OpFunction
+; CHECK:      [[ULT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpULessThan {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpULessThan {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_ult(i16* %a, i16* %b) {
@@ -66,13 +64,13 @@ define i1 @test_ult(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[ULE]] = OpFunction
+; CHECK:      [[ULE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpULessThanEqual {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpULessThanEqual {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_ule(i16* %a, i16* %b) {
@@ -80,13 +78,13 @@ define i1 @test_ule(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[SLE]] = OpFunction
+; CHECK:      [[SLE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpSLessThanEqual {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpSLessThanEqual {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_sle(i16* %a, i16* %b) {
@@ -94,13 +92,13 @@ define i1 @test_sle(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGT]] = OpFunction
+; CHECK:      [[UGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpUGreaterThan {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpUGreaterThan {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_ugt(i16* %a, i16* %b) {
@@ -108,13 +106,13 @@ define i1 @test_ugt(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[SGT]] = OpFunction
+; CHECK:      [[SGT]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpSGreaterThan {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpSGreaterThan {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_sgt(i16* %a, i16* %b) {
@@ -122,13 +120,13 @@ define i1 @test_sgt(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[UGE]] = OpFunction
+; CHECK:      [[UGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpUGreaterThanEqual {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpUGreaterThanEqual {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_uge(i16* %a, i16* %b) {
@@ -136,13 +134,13 @@ define i1 @test_uge(i16* %a, i16* %b) {
   ret i1 %r
 }
 
-; CHECK: [[SGE]] = OpFunction
+; CHECK:      [[SGE]] = OpFunction
 ; CHECK-NEXT: [[A:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: [[B:%.*]] = OpFunctionParameter
 ; CHECK-NEXT: OpLabel
 ; CHECK-NEXT: [[AI:%.*]] = OpConvertPtrToU {{%.+}} [[A]]
 ; CHECK-NEXT: [[BI:%.*]] = OpConvertPtrToU {{%.+}} [[B]]
-; CHECK: [[R:%.*]] = OpSGreaterThanEqual {{%.+}} [[AI]] [[BI]]
+; CHECK:      [[R:%.*]] = OpSGreaterThanEqual {{%.+}} [[AI]] [[BI]]
 ; CHECK-NEXT: OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i1 @test_sge(i16* %a, i16* %b) {
diff --git a/llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll b/llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
index 9668006..da32fee 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/scalar-integer-arithmetic.ll
@@ -5,8 +5,8 @@
 ; CHECK-DAG: OpName [[SCALAR_MUL:%.+]] "scalar_mul"
 ; CHECK-DAG: OpName [[SCALAR_UDIV:%.+]] "scalar_udiv"
 ; CHECK-DAG: OpName [[SCALAR_SDIV:%.+]] "scalar_sdiv"
-; TODO: add tests for urem + srem
-; TODO: add test for OpSNegate
+;; TODO: add tests for urem + srem
+;; TODO: add test for OpSNegate
 
 ; CHECK-NOT: DAG-FENCE
 
@@ -16,76 +16,76 @@
 ; CHECK-NOT: DAG-FENCE
 
 
-; Test add on scalar:
+;; Test add on scalar:
 define i32 @scalar_add(i32 %a, i32 %b) {
     %c = add i32 %a, %b
     ret i32 %c
 }
 
-; CHECK: [[SCALAR_ADD]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
+; CHECK:      [[SCALAR_ADD]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[SCALAR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[SCALAR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpIAdd [[SCALAR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpIAdd [[SCALAR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test sub on scalar:
+;; Test sub on scalar:
 define i32 @scalar_sub(i32 %a, i32 %b) {
     %c = sub i32 %a, %b
     ret i32 %c
 }
 
-; CHECK: [[SCALAR_SUB]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
+; CHECK:      [[SCALAR_SUB]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[SCALAR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[SCALAR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpISub [[SCALAR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpISub [[SCALAR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test mul on scalar:
+;; Test mul on scalar:
 define i32 @scalar_mul(i32 %a, i32 %b) {
     %c = mul i32 %a, %b
     ret i32 %c
 }
 
-; CHECK: [[SCALAR_MUL]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
+; CHECK:      [[SCALAR_MUL]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[SCALAR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[SCALAR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpIMul [[SCALAR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpIMul [[SCALAR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test udiv on scalar:
+;; Test udiv on scalar:
 define i32 @scalar_udiv(i32 %a, i32 %b) {
     %c = udiv i32 %a, %b
     ret i32 %c
 }
 
-; CHECK: [[SCALAR_UDIV]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
+; CHECK:      [[SCALAR_UDIV]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[SCALAR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[SCALAR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpUDiv [[SCALAR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpUDiv [[SCALAR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test sdiv on scalar:
+;; Test sdiv on scalar:
 define i32 @scalar_sdiv(i32 %a, i32 %b) {
     %c = sdiv i32 %a, %b
     ret i32 %c
 }
 
-; CHECK: [[SCALAR_SDIV]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
+; CHECK:      [[SCALAR_SDIV]] = OpFunction [[SCALAR]] None [[SCALAR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[SCALAR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[SCALAR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpSDiv [[SCALAR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpSDiv [[SCALAR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
diff --git a/llvm/test/CodeGen/SPIRV/instructions/select.ll b/llvm/test/CodeGen/SPIRV/instructions/select.ll
index f4ad1c9..f54ef21 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/select.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/select.ll
@@ -1,42 +1,42 @@
 ; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
 
-; CHECK-DAG: OpName [[SCALARi32:%.+]] "select_i32"
-; CHECK-DAG: OpName [[VEC2i32:%.+]] "select_i32v2"
-; CHECK-DAG: OpName [[VEC2i32v2:%.+]] "select_v2i32v2"
+; CHECK-DAG:  OpName [[SCALARi32:%.+]] "select_i32"
+; CHECK-DAG:  OpName [[VEC2i32:%.+]] "select_i32v2"
+; CHECK-DAG:  OpName [[VEC2i32v2:%.+]] "select_v2i32v2"
 
-; CHECK: [[SCALARi32]] = OpFunction
+; CHECK:      [[SCALARi32]] = OpFunction
 ; CHECK-NEXT: [[C:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[T:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[F:%.+]] = OpFunctionParameter
-; CHECK: OpLabel
-; CHECK: [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define i32 @select_i32(i1 %c, i32 %t, i32 %f) {
   %r = select i1 %c, i32 %t, i32 %f
   ret i32 %r
 }
 
-; CHECK: [[VEC2i32]] = OpFunction
+; CHECK:      [[VEC2i32]] = OpFunction
 ; CHECK-NEXT: [[C:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[T:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[F:%.+]] = OpFunctionParameter
-; CHECK: OpLabel
-; CHECK: [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i32> @select_i32v2(i1 %c, <2 x i32> %t, <2 x i32> %f) {
   %r = select i1 %c, <2 x i32> %t, <2 x i32> %f
   ret <2 x i32> %r
 }
 
-; CHECK: [[VEC2i32v2]] = OpFunction
+; CHECK:      [[VEC2i32v2]] = OpFunction
 ; CHECK-NEXT: [[C:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[T:%.+]] = OpFunctionParameter
 ; CHECK-NEXT: [[F:%.+]] = OpFunctionParameter
-; CHECK: OpLabel
-; CHECK: [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
-; CHECK: OpReturnValue [[R]]
+; CHECK:      OpLabel
+; CHECK:      [[R:%.+]] = OpSelect {{%.+}} [[C]] [[T]] [[F]]
+; CHECK:      OpReturnValue [[R]]
 ; CHECK-NEXT: OpFunctionEnd
 define <2 x i32> @select_v2i32v2(<2 x i1> %c, <2 x i32> %t, <2 x i32> %f) {
   %r = select <2 x i1> %c, <2 x i32> %t, <2 x i32> %f
diff --git a/llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll b/llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
index c2757be..5513dda 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/vector-floating-point-arithmetic.ll
@@ -6,7 +6,7 @@
 ; CHECK-DAG: OpName [[VECTOR_FMUL:%.+]] "vector_fmul"
 ; CHECK-DAG: OpName [[VECTOR_FDIV:%.+]] "vector_fdiv"
 ; CHECK-DAG: OpName [[VECTOR_FREM:%.+]] "vector_frem"
-; TODO: add test for OpFMod
+;; TODO: add test for OpFMod
 
 ; CHECK-NOT: DAG-FENCE
 
@@ -17,91 +17,91 @@
 ; CHECK-NOT: DAG-FENCE
 
 
-; Test fneg on vector:
+;; Test fneg on vector:
 define <2 x half> @vector_fneg(<2 x half> %a, <2 x half> %unused) {
     %c = fneg <2 x half> %a
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FNEG]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FNEG]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFNegate [[VECTOR]] [[A]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFNegate [[VECTOR]] [[A]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test fadd on vector:
+;; Test fadd on vector:
 define <2 x half> @vector_fadd(<2 x half> %a, <2 x half> %b) {
     %c = fadd <2 x half> %a, %b
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FADD]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FADD]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFAdd [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFAdd [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test fsub on vector:
+;; Test fsub on vector:
 define <2 x half> @vector_fsub(<2 x half> %a, <2 x half> %b) {
     %c = fsub <2 x half> %a, %b
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FSUB]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FSUB]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFSub [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFSub [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test fmul on vector:
+;; Test fmul on vector:
 define <2 x half> @vector_fmul(<2 x half> %a, <2 x half> %b) {
     %c = fmul <2 x half> %a, %b
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FMUL]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FMUL]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFMul [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFMul [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test fdiv on vector:
+;; Test fdiv on vector:
 define <2 x half> @vector_fdiv(<2 x half> %a, <2 x half> %b) {
     %c = fdiv <2 x half> %a, %b
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFDiv [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFDiv [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test frem on vector:
+;; Test frem on vector:
 define <2 x half> @vector_frem(<2 x half> %a, <2 x half> %b) {
     %c = frem <2 x half> %a, %b
     ret <2 x half> %c
 }
 
-; CHECK: [[VECTOR_FREM]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_FREM]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpFRem [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpFRem [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
diff --git a/llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll b/llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
index ac656af..1e61c7a 100644
--- a/llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
+++ b/llvm/test/CodeGen/SPIRV/instructions/vector-integer-arithmetic.ll
@@ -5,8 +5,8 @@
 ; CHECK-DAG: OpName [[VECTOR_MUL:%.+]] "vector_mul"
 ; CHECK-DAG: OpName [[VECTOR_UDIV:%.+]] "vector_udiv"
 ; CHECK-DAG: OpName [[VECTOR_SDIV:%.+]] "vector_sdiv"
-; TODO: add tests for urem + srem
-; TODO: add test for OpSNegate
+;; TODO: add tests for urem + srem
+;; TODO: add test for OpSNegate
 
 ; CHECK-NOT: DAG-FENCE
 
@@ -17,76 +17,76 @@
 ; CHECK-NOT: DAG-FENCE
 
 
-; Test add on vector:
+;; Test add on vector:
 define <2 x i16> @vector_add(<2 x i16> %a, <2 x i16> %b) {
     %c = add <2 x i16> %a, %b
     ret <2 x i16> %c
 }
 
-; CHECK: [[VECTOR_ADD]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_ADD]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpIAdd [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpIAdd [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test sub on vector:
+;; Test sub on vector:
 define <2 x i16> @vector_sub(<2 x i16> %a, <2 x i16> %b) {
     %c = sub <2 x i16> %a, %b
     ret <2 x i16> %c
 }
 
-; CHECK: [[VECTOR_SUB]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_SUB]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpISub [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpISub [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test mul on vector:
+;; Test mul on vector:
 define <2 x i16> @vector_mul(<2 x i16> %a, <2 x i16> %b) {
     %c = mul <2 x i16> %a, %b
     ret <2 x i16> %c
 }
 
-; CHECK: [[VECTOR_MUL]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_MUL]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpIMul [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpIMul [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test udiv on vector:
+;; Test udiv on vector:
 define <2 x i16> @vector_udiv(<2 x i16> %a, <2 x i16> %b) {
     %c = udiv <2 x i16> %a, %b
     ret <2 x i16> %c
 }
 
-; CHECK: [[VECTOR_UDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_UDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpUDiv [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpUDiv [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
 
 
-; Test sdiv on vector:
+;; Test sdiv on vector:
 define <2 x i16> @vector_sdiv(<2 x i16> %a, <2 x i16> %b) {
     %c = sdiv <2 x i16> %a, %b
     ret <2 x i16> %c
 }
 
-; CHECK: [[VECTOR_SDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
+; CHECK:      [[VECTOR_SDIV]] = OpFunction [[VECTOR]] None [[VECTOR_FN]]
 ; CHECK-NEXT: [[A:%.+]] = OpFunctionParameter [[VECTOR]]
 ; CHECK-NEXT: [[B:%.+]] = OpFunctionParameter [[VECTOR]]
-; CHECK: OpLabel
-; CHECK: [[C:%.+]] = OpSDiv [[VECTOR]] [[A]] [[B]]
-; CHECK: OpReturnValue [[C]]
+; CHECK:      OpLabel
+; CHECK:      [[C:%.+]] = OpSDiv [[VECTOR]] [[A]] [[B]]
+; CHECK:      OpReturnValue [[C]]
 ; CHECK-NEXT: OpFunctionEnd
diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
index 91b55f8..f2d881b 100644
--- a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
+++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/ctpop.ll
@@ -13,7 +13,6 @@
 @g5 = addrspace(1) global <2 x i32> undef, align 4
 
 
-; Function Attrs: norecurse nounwind readnone
 define dso_local spir_kernel void @test(i8 %x8, i16 %x16, i32 %x32, i64 %x64, <2 x i32> %x2i32) local_unnamed_addr {
 entry:
   %0 = tail call i8 @llvm.ctpop.i8(i8 %x8)
@@ -30,17 +29,12 @@ entry:
   ret void
 }
 
-; Function Attrs: inaccessiblememonly nounwind willreturn
 declare i8 @llvm.ctpop.i8(i8)
 
-; Function Attrs: inaccessiblememonly nounwind willreturn
 declare i16 @llvm.ctpop.i16(i16)
 
-; Function Attrs: inaccessiblememonly nounwind willreturn
 declare i32 @llvm.ctpop.i32(i32)
 
-; Function Attrs: inaccessiblememonly nounwind willreturn
 declare i64 @llvm.ctpop.i64(i64)
 
-; Function Attrs: inaccessiblememonly nounwind willreturn
 declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
diff --git a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
index 24388b6..2d5b309 100644
--- a/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
+++ b/llvm/test/CodeGen/SPIRV/llvm-intrinsics/fshl.ll
@@ -1,29 +1,26 @@
 ; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
 
-target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-
-; CHECK-SPIRV: OpName %[[#NAME_FSHL_FUNC_32:]] "spirv.llvm_fshl_i32"
-; CHECK-SPIRV: OpName %[[#NAME_FSHL_FUNC_16:]] "spirv.llvm_fshl_i16"
-; CHECK-SPIRV: OpName %[[#NAME_FSHL_FUNC_VEC_INT_16:]] "spirv.llvm_fshl_v2i16"
-; CHECK-SPIRV: %[[#TYPE_INT_32:]] = OpTypeInt 32 0
-; CHECK-SPIRV: %[[#TYPE_ORIG_FUNC_32:]] = OpTypeFunction %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]]
-; CHECK-SPIRV: %[[#TYPE_INT_16:]] = OpTypeInt 16 0
-; CHECK-SPIRV: %[[#TYPE_ORIG_FUNC_16:]] = OpTypeFunction %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]]
-; CHECK-SPIRV: %[[#TYPE_VEC_INT_16:]] = OpTypeVector %[[#TYPE_INT_16]] 2
-; CHECK-SPIRV: %[[#TYPE_ORIG_FUNC_VEC_INT_16:]] = OpTypeFunction %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]]
-; CHECK-SPIRV: %[[#TYPE_FSHL_FUNC_32:]] = OpTypeFunction %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]]
-; CHECK-SPIRV: %[[#TYPE_FSHL_FUNC_16:]] = OpTypeFunction %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]]
-; CHECK-SPIRV: %[[#TYPE_FSHL_FUNC_VEC_INT_16:]] = OpTypeFunction %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]]
+; CHECK-SPIRV:     OpName %[[#NAME_FSHL_FUNC_32:]] "spirv.llvm_fshl_i32"
+; CHECK-SPIRV:     OpName %[[#NAME_FSHL_FUNC_16:]] "spirv.llvm_fshl_i16"
+; CHECK-SPIRV:     OpName %[[#NAME_FSHL_FUNC_VEC_INT_16:]] "spirv.llvm_fshl_v2i16"
+; CHECK-SPIRV:     %[[#TYPE_INT_32:]] = OpTypeInt 32 0
+; CHECK-SPIRV:     %[[#TYPE_ORIG_FUNC_32:]] = OpTypeFunction %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]]
+; CHECK-SPIRV:     %[[#TYPE_INT_16:]] = OpTypeInt 16 0
+; CHECK-SPIRV:     %[[#TYPE_ORIG_FUNC_16:]] = OpTypeFunction %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]]
+; CHECK-SPIRV:     %[[#TYPE_VEC_INT_16:]] = OpTypeVector %[[#TYPE_INT_16]] 2
+; CHECK-SPIRV:     %[[#TYPE_ORIG_FUNC_VEC_INT_16:]] = OpTypeFunction %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]]
+; CHECK-SPIRV:     %[[#TYPE_FSHL_FUNC_32:]] = OpTypeFunction %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]] %[[#TYPE_INT_32]]
+; CHECK-SPIRV:     %[[#TYPE_FSHL_FUNC_16:]] = OpTypeFunction %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]] %[[#TYPE_INT_16]]
+; CHECK-SPIRV:     %[[#TYPE_FSHL_FUNC_VEC_INT_16:]] = OpTypeFunction %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]] %[[#TYPE_VEC_INT_16]]
 ; CHECK-SPIRV-DAG: %[[#CONST_ROTATE_32:]] = OpConstant %[[#TYPE_INT_32]] 8
 ; CHECK-SPIRV-DAG: %[[#CONST_ROTATE_16:]] = OpConstant %[[#TYPE_INT_16]] 8
-; CHECK-SPIRV: %[[#CONST_ROTATE_VEC_INT_16:]] = OpConstantComposite %[[#TYPE_VEC_INT_16]] %[[#CONST_ROTATE_16]] %[[#CONST_ROTATE_16]]
+; CHECK-SPIRV:     %[[#CONST_ROTATE_VEC_INT_16:]] = OpConstantComposite %[[#TYPE_VEC_INT_16]] %[[#CONST_ROTATE_16]] %[[#CONST_ROTATE_16]]
 ; CHECK-SPIRV-DAG: %[[#CONST_TYPE_SIZE_32:]] = OpConstant %[[#TYPE_INT_32]] 32
 
-; Function Attrs: nounwind readnone
 ; CHECK-SPIRV: %[[#]] = OpFunction %[[#TYPE_INT_32]] {{.*}} %[[#TYPE_ORIG_FUNC_32]]
 ; CHECK-SPIRV: %[[#X:]] = OpFunctionParameter %[[#TYPE_INT_32]]
 ; CHECK-SPIRV: %[[#Y:]] = OpFunctionParameter %[[#TYPE_INT_32]]
-define spir_func i32 @Test_i32(i32 %x, i32 %y) local_unnamed_addr #0 {
+define spir_func i32 @Test_i32(i32 %x, i32 %y) local_unnamed_addr {
 entry:
   ; CHECK-SPIRV: %[[#CALL_32_X_Y:]] = OpFunctionCall %[[#TYPE_INT_32]] %[[#NAME_FSHL_FUNC_32]] %[[#X]] %[[#Y]] %[[#CONST_ROTATE_32]]
   %0 = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 8)
@@ -35,11 +32,10 @@ entry:
   ret i32 %sum
 }
 
-; Function Attrs: nounwind readnone
 ; CHECK-SPIRV: %[[#]] = OpFunction %[[#TYPE_INT_16]] {{.*}} %[[#TYPE_ORIG_FUNC_16]]
 ; CHECK-SPIRV: %[[#X:]] = OpFunctionParameter %[[#TYPE_INT_16]]
 ; CHECK-SPIRV: %[[#Y:]] = OpFunctionParameter %[[#TYPE_INT_16]]
-define spir_func i16 @Test_i16(i16 %x, i16 %y) local_unnamed_addr #0 {
+define spir_func i16 @Test_i16(i16 %x, i16 %y) local_unnamed_addr {
 entry:
   ; CHECK-SPIRV: %[[#CALL_16:]] = OpFunctionCall %[[#TYPE_INT_16]] %[[#NAME_FSHL_FUNC_16]] %[[#X]] %[[#Y]] %[[#CONST_ROTATE_16]]
   %0 = call i16 @llvm.fshl.i16(i16 %x, i16 %y, i16 8)
@@ -50,7 +46,7 @@ entry:
 ; CHECK-SPIRV: %[[#]] = OpFunction %[[#TYPE_VEC_INT_16]] {{.*}} %[[#TYPE_ORIG_FUNC_VEC_INT_16]]
 ; CHECK-SPIRV: %[[#X:]] = OpFunctionParameter %[[#TYPE_VEC_INT_16]]
 ; CHECK-SPIRV: %[[#Y:]] = OpFunctionParameter %[[#TYPE_VEC_INT_16]]
-define spir_func <2 x i16> @Test_v2i16(<2 x i16> %x, <2 x i16> %y) local_unnamed_addr #0 {
+define spir_func <2 x i16> @Test_v2i16(<2 x i16> %x, <2 x i16> %y) local_unnamed_addr {
 entry:
   ; CHECK-SPIRV: %[[#CALL_VEC_INT_16:]] = OpFunctionCall %[[#TYPE_VEC_INT_16]] %[[#NAME_FSHL_FUNC_VEC_INT_16]] %[[#X]] %[[#Y]] %[[#CONST_ROTATE_VEC_INT_16]]
   %0 = call <2 x i16> @llvm.fshl.v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> <i16 8, i16 8>)
@@ -70,25 +66,20 @@ entry:
 ; CHECK-SPIRV: %[[#FSHL_RESULT:]] = OpBitwiseOr %[[#TYPE_INT_32]] %[[#X_SHIFT_LEFT]] %[[#Y_SHIFT_RIGHT]]
 ; CHECK-SPIRV: OpReturnValue %[[#FSHL_RESULT]]
 
-; Just check that the function for i16 was generated as such - we've checked the logic for another type.
+;; Just check that the function for i16 was generated as such - we've checked the logic for another type.
 ; CHECK-SPIRV: %[[#NAME_FSHL_FUNC_16]] = OpFunction %[[#TYPE_INT_16]] {{.*}} %[[#TYPE_FSHL_FUNC_16]]
 ; CHECK-SPIRV: %[[#X_FSHL:]] = OpFunctionParameter %[[#TYPE_INT_16]]
 ; CHECK-SPIRV: %[[#Y_FSHL:]] = OpFunctionParameter %[[#TYPE_INT_16]]
 ; CHECK-SPIRV: %[[#ROT:]] = OpFunctionParameter %[[#TYPE_INT_16]]
 
-; Just check that the function for v2i16 was generated as such - we've checked the logic for another type.
+;; Just check that the function for v2i16 was generated as such - we've checked the logic for another type.
 ; CHECK-SPIRV: %[[#NAME_FSHL_FUNC_VEC_INT_16]] = OpFunction %[[#TYPE_VEC_INT_16]] {{.*}} %[[#TYPE_FSHL_FUNC_VEC_INT_16]]
 ; CHECK-SPIRV: %[[#X_FSHL:]] = OpFunctionParameter %[[#TYPE_VEC_INT_16]]
 ; CHECK-SPIRV: %[[#Y_FSHL:]] = OpFunctionParameter %[[#TYPE_VEC_INT_16]]
 ; CHECK-SPIRV: %[[#ROT:]] = OpFunctionParameter %[[#TYPE_VEC_INT_16]]
 
-; Function Attrs: nounwind readnone speculatable willreturn
-declare i32 @llvm.fshl.i32(i32, i32, i32) #1
-
-; Function Attrs: nounwind readnone speculatable willreturn
-declare i16 @llvm.fshl.i16(i16, i16, i16) #1
+declare i32 @llvm.fshl.i32(i32, i32, i32)
 
-; Function Attrs: nounwind readnone speculatable willreturn
-declare <2 x i16> @llvm.fshl.v2i16(<2 x i16>, <2 x i16>, <2 x i16>) #1
+declare i16 @llvm.fshl.i16(i16, i16, i16)
 
-attributes #1 = { nounwind readnone speculatable willreturn }
+declare <2 x i16> @llvm.fshl.v2i16(<2 x i16>, <2 x i16>, <2 x i16>)
diff --git a/llvm/test/CodeGen/SPIRV/metadata-opencl.ll b/llvm/test/CodeGen/SPIRV/metadata-opencl.ll
index 4813c33..3d37924 100644
--- a/llvm/test/CodeGen/SPIRV/metadata-opencl.ll
+++ b/llvm/test/CodeGen/SPIRV/metadata-opencl.ll
@@ -6,15 +6,14 @@
 ;--- metadata-opencl12.ll
 !opencl.ocl.version = !{!0}
 !0 = !{i32 1, i32 2}
-
 ; CHECK: OpSource OpenCL_C 102000
+
 ;--- metadata-opencl20.ll
 !opencl.ocl.version = !{!0}
 !0 = !{i32 2, i32 0}
-
 ; CHECK: OpSource OpenCL_C 200000
+
 ;--- metadata-opencl22.ll
 !opencl.ocl.version = !{!0}
 !0 = !{i32 2, i32 2}
-
 ; CHECK: OpSource OpenCL_C 202000
diff --git a/llvm/test/CodeGen/SPIRV/opaque_pointers.ll b/llvm/test/CodeGen/SPIRV/opaque_pointers.ll
index 8720530..92c29d6 100644
--- a/llvm/test/CodeGen/SPIRV/opaque_pointers.ll
+++ b/llvm/test/CodeGen/SPIRV/opaque_pointers.ll
@@ -12,8 +12,6 @@
 ; CHECK: %[[#Res:]] = OpLoad %[[#Int64Ty]] %[[#Parm]] Aligned 8
 ; CHECK: OpReturnValue %[[#Res]]
 
-target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-
 define i64 @test(ptr %p) {
   store i32 0, ptr %p
   %v = load i64, ptr %p
diff --git a/llvm/test/CodeGen/SPIRV/struct.ll b/llvm/test/CodeGen/SPIRV/struct.ll
index 56b6c9f..e17d1fb 100644
--- a/llvm/test/CodeGen/SPIRV/struct.ll
+++ b/llvm/test/CodeGen/SPIRV/struct.ll
@@ -2,15 +2,15 @@
 
 %struct.ST = type { i32, i32, i32 }
 
-; CHECK-SPIRV: OpName %[[#struct:]] "struct.ST"
-; CHECK-SPIRV: %[[#int:]] = OpTypeInt 32 0
+; CHECK-SPIRV:     OpName %[[#struct:]] "struct.ST"
+; CHECK-SPIRV:     %[[#int:]] = OpTypeInt 32 0
 ; CHECK-SPIRV-DAG: %[[#struct]] = OpTypeStruct %[[#int]] %[[#int]] %[[#int]]
 ; CHECK-SPIRV-DAG: %[[#structP:]] = OpTypePointer Function %[[#struct]]
 ; CHECK-SPIRV-DAG: %[[#intP:]] = OpTypePointer Function %[[#int]]
-; CHECK-SPIRV: %[[#zero:]] = OpConstant %[[#int]] 0
-; CHECK-SPIRV: %[[#one:]] = OpConstant %[[#int]] 1
-; CHECK-SPIRV: %[[#two:]] = OpConstant %[[#int]] 2
-; CHECK-SPIRV: %[[#three:]] = OpConstant %[[#int]] 3
+; CHECK-SPIRV:     %[[#zero:]] = OpConstant %[[#int]] 0
+; CHECK-SPIRV:     %[[#one:]] = OpConstant %[[#int]] 1
+; CHECK-SPIRV:     %[[#two:]] = OpConstant %[[#int]] 2
+; CHECK-SPIRV:     %[[#three:]] = OpConstant %[[#int]] 3
 
 define dso_local spir_func i32 @func() {
 entry:
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll b/llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll
index c6c3db1..64f25b7 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/DecorationMaxByteOffset.ll
@@ -9,7 +9,6 @@
 ; CHECK-SPIRV:     %[[#PTR_ID]] = OpFunctionParameter %[[#CHAR_PTR_T]]
 ; CHECK-SPIRV:     %[[#PTR2_ID]] = OpFunctionParameter %[[#CHAR_PTR_T]]
 
-; Function Attrs: nounwind
 define spir_kernel void @worker(i8 addrspace(3)* dereferenceable(12) %ptr) {
 entry:
   %ptr.addr = alloca i8 addrspace(3)*, align 4
@@ -17,7 +16,6 @@ entry:
   ret void
 }
 
-; Function Attrs: nounwind
 define spir_func void @not_a_kernel(i8 addrspace(3)* dereferenceable(123) %ptr2) {
 entry:
   ret void
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i32.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i32.ll
index 7190e8f..f396b5a 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i32.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_i32.ll
@@ -3,7 +3,6 @@
 ; CHECK-SPIRV: %[[#int:]] = OpTypeInt 32
 ; CHECK-SPIRV: OpBitReverse %[[#int]]
 
-; Function Attrs: convergent nounwind writeonly
 define spir_kernel void @testBitRev(i32 %a, i32 %b, i32 %c, i32 addrspace(1)* nocapture %res) local_unnamed_addr {
 entry:
   %call = tail call i32 @llvm.bitreverse.i32(i32 %b)
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_v2i16.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_v2i16.ll
index 1516b97..8f04929 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_v2i16.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse_v2i16.ll
@@ -4,7 +4,6 @@
 ; CHECK-SPIRV: %[[#short2:]] = OpTypeVector %[[#short]] 2
 ; CHECK-SPIRV: OpBitReverse %[[#short2]]
 
-; Function Attrs: convergent nounwind writeonly
 define spir_kernel void @testBitRev(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c, <2 x i16> addrspace(1)* nocapture %res) local_unnamed_addr {
 entry:
   %call = tail call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %b)
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll
index a4f5530..9252e264 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll
@@ -24,8 +24,8 @@ entry:
 for.cond:                                         ; preds = %for.inc, %entry
   %pNode.0 = phi %struct.Node addrspace(1)* [ %pNodes, %entry ], [ %1, %for.inc ]
   %j.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
-;CHECK-SPIRV: %[[#]] = OpPhi %[[#]] %[[#]] %[[#]] %[[#BitcastResultId:]] %[[#]]
-;CHECK-SPIRV-NEXT: OpPhi
+; CHECK-SPIRV:      %[[#]] = OpPhi %[[#]] %[[#]] %[[#]] %[[#BitcastResultId:]] %[[#]]
+; CHECK-SPIRV-NEXT: OpPhi
 
   %cmp = icmp slt i32 %j.0, 10
   br i1 %cmp, label %for.body, label %for.end
@@ -35,8 +35,8 @@ for.body:                                         ; preds = %for.cond
 
   %0 = load %struct.Node.0 addrspace(1)*, %struct.Node.0 addrspace(1)* addrspace(1)* %pNext, align 4
   %1 = bitcast %struct.Node.0 addrspace(1)* %0 to %struct.Node addrspace(1)*
-;CHECK-SPIRV: %[[#LoadResultId:]] = OpLoad %[[#]]
-;CHECK-SPIRV: %[[#BitcastResultId]] = OpBitcast %[[#]] %[[#LoadResultId]]
+; CHECK-SPIRV: %[[#LoadResultId:]] = OpLoad %[[#]]
+; CHECK-SPIRV: %[[#BitcastResultId]] = OpBitcast %[[#]] %[[#LoadResultId]]
 
   br label %for.inc
 
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpSwitchEmpty.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpSwitchEmpty.ll
index ca20aeb..c309883 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpSwitchEmpty.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpSwitchEmpty.ll
@@ -14,7 +14,6 @@
 ; CHECK-SPIRV: OpSwitch %[[#X]] %[[#DEFAULT:]]{{$}}
 ; CHECK-SPIRV: %[[#DEFAULT]] = OpLabel
 
-; Function Attrs: nounwind
 define spir_func void @kk(i32 %x) {
 entry:
   switch i32 %x, label %sw.default [
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll
index b203d247..c770ab7 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpVectorExtractDynamic.ll
@@ -9,7 +9,6 @@
 
 ; CHECK-SPIRV: %[[#res]] = OpVectorExtractDynamic %[[#float]] %[[#vec]] %[[#index]]
 
-; Function Attrs: nounwind
 define spir_kernel void @test(float addrspace(1)* nocapture %out, <2 x float> %vec, i32 %index) {
 entry:
   %res = extractelement <2 x float> %vec, i32 %index
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll b/llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll
index 2512c14..7877b4e 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/RelationalOperators.ll
@@ -1,298 +1,256 @@
 ; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
 
-; ModuleID = 'RelationalOperators.cl'
-source_filename = "RelationalOperators.cl"
-target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spirv32-unknown-unknown"
-
-; CHECK-SPIRV: %[[bool:[0-9]+]] = OpTypeBool
-; CHECK-SPIRV: %[[bool2:[0-9]+]] = OpTypeVector %[[bool]] 2
-
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpUGreaterThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
-
-; kernel void testUGreaterThan(uint2 a, uint2 b, global int2 *res) {
-;   res[0] = a > b;
-; }
-
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testUGreaterThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+; CHECK-SPIRV:      %[[#bool:]] = OpTypeBool
+; CHECK-SPIRV:      %[[#bool2:]] = OpTypeVector %[[#bool]] 2
+
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpUGreaterThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
+
+;; kernel void testUGreaterThan(uint2 a, uint2 b, global int2 *res) {
+;;   res[0] = a > b;
+;; }
+
+define dso_local spir_kernel void @testUGreaterThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp ugt <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpSGreaterThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpSGreaterThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testSGreaterThan(int2 a, int2 b, global int2 *res) {
-;   res[0] = a > b;
-; }
+;; kernel void testSGreaterThan(int2 a, int2 b, global int2 *res) {
+;;   res[0] = a > b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testSGreaterThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !11 !kernel_arg_base_type !12 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testSGreaterThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp sgt <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpUGreaterThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpUGreaterThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testUGreaterThanEqual(uint2 a, uint2 b, global int2 *res) {
-;   res[0] = a >= b;
-; }
+;; kernel void testUGreaterThanEqual(uint2 a, uint2 b, global int2 *res) {
+;;   res[0] = a >= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testUGreaterThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testUGreaterThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp uge <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpSGreaterThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpSGreaterThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testSGreaterThanEqual(int2 a, int2 b, global int2 *res) {
-;   res[0] = a >= b;
-; }
+;; kernel void testSGreaterThanEqual(int2 a, int2 b, global int2 *res) {
+;;   res[0] = a >= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testSGreaterThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !11 !kernel_arg_base_type !12 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testSGreaterThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp sge <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpULessThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpULessThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testULessThan(uint2 a, uint2 b, global int2 *res) {
-;   res[0] = a < b;
-; }
+;; kernel void testULessThan(uint2 a, uint2 b, global int2 *res) {
+;;   res[0] = a < b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testULessThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testULessThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp ult <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpSLessThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpSLessThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testSLessThan(int2 a, int2 b, global int2 *res) {
-;   res[0] = a < b;
-; }
+;; kernel void testSLessThan(int2 a, int2 b, global int2 *res) {
+;;   res[0] = a < b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testSLessThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !11 !kernel_arg_base_type !12 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testSLessThan(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp slt <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpULessThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpULessThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testULessThanEqual(uint2 a, uint2 b, global int2 *res) {
-;   res[0] = a <= b;
-; }
+;; kernel void testULessThanEqual(uint2 a, uint2 b, global int2 *res) {
+;;   res[0] = a <= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testULessThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testULessThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp ule <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpSLessThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpSLessThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testSLessThanEqual(int2 a, int2 b, global int2 *res) {
-;   res[0] = a <= b;
-; }
+;; kernel void testSLessThanEqual(int2 a, int2 b, global int2 *res) {
+;;   res[0] = a <= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testSLessThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !11 !kernel_arg_base_type !12 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testSLessThanEqual(<2 x i32> noundef %a, <2 x i32> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = icmp sle <2 x i32> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFOrdEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFOrdEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFOrdEqual(float2 a, float2 b, global int2 *res) {
-;   res[0] = a == b;
-; }
+;; kernel void testFOrdEqual(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a == b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFOrdEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFOrdEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp oeq <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFUnordNotEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFUnordNotEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFUnordNotEqual(float2 a, float2 b, global int2 *res) {
-;   res[0] = a != b;
-; }
+;; kernel void testFUnordNotEqual(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a != b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFUnordNotEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFUnordNotEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp une <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFOrdGreaterThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFOrdGreaterThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFOrdGreaterThan(float2 a, float2 b, global int2 *res) {
-;   res[0] = a > b;
-; }
+;; kernel void testFOrdGreaterThan(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a > b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFOrdGreaterThan(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFOrdGreaterThan(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp ogt <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFOrdGreaterThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFOrdGreaterThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFOrdGreaterThanEqual(float2 a, float2 b, global int2 *res) {
-;   res[0] = a >= b;
-; }
+;; kernel void testFOrdGreaterThanEqual(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a >= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFOrdGreaterThanEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFOrdGreaterThanEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp oge <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFOrdLessThan %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFOrdLessThan %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFOrdLessThan(float2 a, float2 b, global int2 *res) {
-;   res[0] = a < b;
-; }
+;; kernel void testFOrdLessThan(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a < b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFOrdLessThan(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFOrdLessThan(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp olt <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
 
-; CHECK-SPIRV: OpFunction
-; CHECK-SPIRV-NEXT: %[[A:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV-NEXT: %[[B:[0-9]+]] = OpFunctionParameter %{{[0-9]+}}
-; CHECK-SPIRV: %{{[0-9]+}} = OpFOrdLessThanEqual %[[bool2]] %[[A]] %[[B]]
-; CHECK-SPIRV: OpFunctionEnd
+; CHECK-SPIRV:      OpFunction
+; CHECK-SPIRV-NEXT: %[[#A:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV-NEXT: %[[#B:]] = OpFunctionParameter %[[#]]
+; CHECK-SPIRV:      %[[#]] = OpFOrdLessThanEqual %[[#bool2]] %[[#A]] %[[#B]]
+; CHECK-SPIRV:      OpFunctionEnd
 
-; kernel void testFOrdLessThanEqual(float2 a, float2 b, global int2 *res) {
-;   res[0] = a <= b;
-; }
+;; kernel void testFOrdLessThanEqual(float2 a, float2 b, global int2 *res) {
+;;   res[0] = a <= b;
+;; }
 
-; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
-define dso_local spir_kernel void @testFOrdLessThanEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !13 !kernel_arg_base_type !14 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @testFOrdLessThanEqual(<2 x float> noundef %a, <2 x float> noundef %b, <2 x i32> addrspace(1)* nocapture noundef writeonly %res) local_unnamed_addr {
 entry:
   %cmp = fcmp ole <2 x float> %a, %b
   %sext = sext <2 x i1> %cmp to <2 x i32>
-  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8, !tbaa !8
+  store <2 x i32> %sext, <2 x i32> addrspace(1)* %res, align 8
   ret void
 }
-
-attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn writeonly "frame-pointer"="none" "min-legal-vector-width"="64" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" }
-
-!llvm.module.flags = !{!0}
-!opencl.ocl.version = !{!1}
-!opencl.spir.version = !{!1}
-!llvm.ident = !{!2}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 2, i32 0}
-!2 = !{!"clang version 14.0.0 (https://github.com/llvm/llvm-project.git 881b6a009fb6e2dd5fb924524cd6eacd14148a08)"}
-!3 = !{i32 0, i32 0, i32 1}
-!4 = !{!"none", !"none", !"none"}
-!5 = !{!"uint2", !"uint2", !"int2*"}
-!6 = !{!"uint __attribute__((ext_vector_type(2)))", !"uint __attribute__((ext_vector_type(2)))", !"int __attribute__((ext_vector_type(2)))*"}
-!7 = !{!"", !"", !""}
-!8 = !{!9, !9, i64 0}
-!9 = !{!"omnipotent char", !10, i64 0}
-!10 = !{!"Simple C/C++ TBAA"}
-!11 = !{!"int2", !"int2", !"int2*"}
-!12 = !{!"int __attribute__((ext_vector_type(2)))", !"int __attribute__((ext_vector_type(2)))", !"int __attribute__((ext_vector_type(2)))*"}
-!13 = !{!"float2", !"float2", !"int2*"}
-!14 = !{!"float __attribute__((ext_vector_type(2)))", !"float __attribute__((ext_vector_type(2)))", !"int __attribute__((ext_vector_type(2)))*"}
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll b/llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
index 14dfd6f..572ccc3 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
@@ -183,11 +183,7 @@
 ; CHECK-SPIRV: %[[#r89]] = OpUnordered %[[#bool]]
 ; CHECK-SPIRV: %[[#r90]] = OpUnordered %[[#bool]]
 
-target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
-target triple = "spirv32-unknown-unknown"
-
-; Function Attrs: nounwind
-define spir_kernel void @testFCmp(float %a, float %b) local_unnamed_addr #0 !kernel_arg_addr_space !2 !kernel_arg_access_qual !3 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !5 {
+define spir_kernel void @testFCmp(float %a, float %b) local_unnamed_addr {
 entry:
   %r1 = fcmp oeq float %a, %b
   %r2 = fcmp nnan oeq float %a, %b
@@ -281,16 +277,3 @@ entry:
   %r90 = fcmp nsz uno float %a, %b
   ret void
 }
-
-attributes #0 = { convergent nounwind writeonly "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
-
-!llvm.module.flags = !{!0}
-!opencl.ocl.version = !{!1}
-!opencl.spir.version = !{!1}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 2, i32 0}
-!2 = !{i32 0, i32 0}
-!3 = !{!"none", !"none"}
-!4 = !{!"float", !"float"}
-!5 = !{!"", !""}
diff --git a/llvm/test/CodeGen/SPIRV/transcoding/readonly.ll b/llvm/test/CodeGen/SPIRV/transcoding/readonly.ll
index 032837c..051d803 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/readonly.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/readonly.ll
@@ -1,27 +1,9 @@
-; RUN: llc -O0 %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llc -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
 
-; CHECK-SPIRV: OpDecorate %[[PARAM:[0-9]+]] FuncParamAttr NoWrite
-; CHECK-SPIRV: %[[PARAM]] = OpFunctionParameter %{{.*}}
+; CHECK-SPIRV: OpDecorate %[[#PARAM:]] FuncParamAttr NoWrite
+; CHECK-SPIRV: %[[#PARAM]] = OpFunctionParameter %{{.*}}
 
-; ModuleID = 'readonly.bc'
-source_filename = "readonly.cpp"
-target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
-target triple = "spirv64-unknown-unknown"
-
-; Function Attrs: norecurse nounwind readonly willreturn
-define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function(i32 addrspace(1)* readonly %_arg_) local_unnamed_addr #0 {
+define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function(i32 addrspace(1)* readonly %_arg_) local_unnamed_addr {
 entry:
   ret void
 }
-
-attributes #0 = { norecurse nounwind }
-
-!llvm.module.flags = !{!0}
-!opencl.spir.version = !{!1}
-!spirv.Source = !{!2}
-!llvm.ident = !{!3}
-
-!0 = !{i32 1, !"wchar_size", i32 4}
-!1 = !{i32 1, i32 2}
-!2 = !{i32 4, i32 100000}
-!3 = !{!"clang version 13.0.0 (https://github.com/intel/llvm.git)"}