From: chiyotsai <chiyotsai@google.com>
Date: Wed, 22 Feb 2023 20:44:47 +0000 (-0800)
Subject: Disable some intra modes for TX_32X32
X-Git-Tag: accepted/tizen/7.0/unified/20240521.012539~1^2~306^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4ba3be9324497d33d51d3b8a8ea900505e6f1450;p=platform%2Fupstream%2Flibvpx.git

Disable some intra modes for TX_32X32

Performance:
| SPD_SET | TESTSET | AVG_PSNR | OVR_PSNR |  SSIM   | ENC_T |
|---------|---------|----------|----------|---------|-------|
|    0    | hdres2  | +0.036%  | +0.032%  | +0.014% | -3.9% |
|    0    | lowres2 | -0.002%  | -0.011%  | +0.020% | -3.6% |
|    0    | midres2 | +0.045%  | +0.025%  | -0.007% | -4.0% |

STATS_CHANGED

Change-Id: I75a927333d26f2a37f0dda57a641b455b845f5b9
---

diff --git a/vp9/encoder/vp9_speed_features.c b/vp9/encoder/vp9_speed_features.c
index 72ac0ce..ce83a97 100644
--- a/vp9/encoder/vp9_speed_features.c
+++ b/vp9/encoder/vp9_speed_features.c
@@ -228,6 +228,8 @@ static void set_good_speed_feature_framesize_independent(VP9_COMP *cpi,
   sf->tx_size_search_breakout = 1;
   sf->use_square_partition_only = !boosted;
 
+  sf->intra_y_mode_mask[TX_32X32] = INTRA_DC_H_V;
+
   // Reference masking is not supported in dynamic scaling mode.
   sf->reference_masking = oxcf->resize_mode != RESIZE_DYNAMIC;
 
@@ -281,7 +283,6 @@ static void set_good_speed_feature_framesize_independent(VP9_COMP *cpi,
     if (cpi->oxcf.content != VP9E_CONTENT_FILM) sf->mode_skip_start = 10;
     sf->allow_acl = 0;
 
-    sf->intra_y_mode_mask[TX_32X32] = INTRA_DC_H_V;
     sf->intra_uv_mode_mask[TX_32X32] = INTRA_DC_H_V;
     if (cpi->oxcf.content != VP9E_CONTENT_FILM) {
       sf->intra_y_mode_mask[TX_16X16] = INTRA_DC_H_V;