From: Ralf Baechle <ralf@linux-mips.org>
Date: Mon, 3 Sep 2007 14:22:26 +0000 (+0200)
Subject: [MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
X-Git-Tag: v3.12-rc1~26957^2~6
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4af2b1454da7a2feec071a6a50dd957df7d0b7a7;p=kernel%2Fkernel-generic.git

[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.

Following a strict interpretation the empty definition of irq_enable_hazard
has always been a bug - but an intentional one because it didn't bite.
This has now changed, for uniprocessor kernels mm/slab.c:do_drain()

[...]
        on_each_cpu(do_drain, cachep, 1, 1);
        check_irq_on();
[...]

may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting
in a back-to-back hazard.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 918a489..6a5fa32 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -172,6 +172,7 @@ ASMMACRO(tlb_probe_hazard,
 	 nop; nop; nop
 	)
 ASMMACRO(irq_enable_hazard,
+	 _ssnop; _ssnop; _ssnop;
 	)
 ASMMACRO(irq_disable_hazard,
 	nop; nop; nop