From: Marek Vasut <marex@denx.de>
Date: Thu, 9 Jul 2015 02:48:56 +0000 (+0200)
Subject: arm: socfpga: spl: Toggle warm reset config I/O bit
X-Git-Tag: v2015.10-rc2~366
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4a0080d98517a3d9b423a319331e73975b43b706;p=platform%2Fkernel%2Fu-boot.git

arm: socfpga: spl: Toggle warm reset config I/O bit

Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
---

diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index fd54ea9..8345975 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -84,8 +84,13 @@ void spl_board_init(void)
 	if (scan_mgr_configure_iocsr())
 		hang();
 
+	sysmgr_config_warmrstcfgio(0);
+
 	/* configure the pin muxing through system manager */
+	sysmgr_config_warmrstcfgio(1);
 	sysmgr_pinmux_init();
+	sysmgr_config_warmrstcfgio(0);
+
 #endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
 
 	/* de-assert reset for peripherals and bridges based on handoff */