From: Ville Syrjälä Date: Tue, 24 Sep 2013 18:26:31 +0000 (+0300) Subject: drm/i915: Don't lie about findind suitable PLL settings on VLV X-Git-Tag: upstream/snapshot3+hdmi~3525^2~90^2~237 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=49e497ef43e06dbf65e0a3637bcaedb31ce17d34;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git drm/i915: Don't lie about findind suitable PLL settings on VLV If vlv_find_best_dpll() couldn't find suitable PLL settings, just say so instead of lying to caller. Signed-off-by: Ville Syrjälä Reviewed-by: Mika Kuoppala Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1ea6d49..0e87970 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -662,6 +662,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, unsigned int bestppm = 1000000; /* min update 19.2 MHz */ int max_n = min(limit->n.max, refclk / 19200); + bool found = false; target *= 5; /* fast clock */ @@ -692,18 +693,20 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc, if (ppm < 100 && clock.p > best_clock->p) { bestppm = 0; *best_clock = clock; + found = true; } if (bestppm >= 10 && ppm < bestppm - 10) { bestppm = ppm; *best_clock = clock; + found = true; } } } } } - return true; + return found; } bool intel_crtc_active(struct drm_crtc *crtc)