From: Jan Beulich Date: Thu, 26 Apr 2018 06:30:45 +0000 (+0200) Subject: x86: move and fold common code in build_modrm_byte() X-Git-Tag: binutils-2_31~648 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=48db9223e95625a2156f60e8f7f339e4bbde3533;p=external%2Fbinutils.git x86: move and fold common code in build_modrm_byte() The source and reg_slot calculations in the VEX3SOURCES only depend on the number of immediate operands. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 2691eb8..f9a0aa9 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2018-04-26 Jan Beulich + * config/tc-i386.c (build_modrm_byte): Move and fold + source/reg_slot calculations. + +2018-04-26 Jan Beulich + * config/tc-i386.c (build_modrm_byte): Drop .veximmext uses. Move part of the remaining assertion. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 2ddbe19..0fff4a1 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -6589,6 +6589,19 @@ build_modrm_byte (void) && i.tm.opcode_modifier.vexw && i.tm.operand_types[dest].bitfield.regsimd); + /* If VexW1 is set, the first non-immediate operand is the source and + the second non-immediate one is encoded in the immediate operand. */ + if (i.tm.opcode_modifier.vexw == VEXW1) + { + source = i.imm_operands; + reg_slot = i.imm_operands + 1; + } + else + { + source = i.imm_operands + 1; + reg_slot = i.imm_operands; + } + if (i.imm_operands == 0) { /* When there is no immediate operand, generate an 8bit @@ -6597,18 +6610,6 @@ build_modrm_byte (void) i.op[i.operands].imms = exp; i.types[i.operands] = imm8; i.operands++; - /* If VexW1 is set, the first operand is the source and - the second operand is encoded in the immediate operand. */ - if (i.tm.opcode_modifier.vexw == VEXW1) - { - source = 0; - reg_slot = 1; - } - else - { - source = 1; - reg_slot = 0; - } gas_assert (i.tm.operand_types[reg_slot].bitfield.regsimd); exp->X_op = O_constant; @@ -6621,23 +6622,6 @@ build_modrm_byte (void) gas_assert (i.imm_operands == 1 && i.types[0].bitfield.vec_imm4); - if (i.tm.opcode_modifier.vexw == VEXW0) - { - /* If VexW0 is set, the third operand is the source and - the second operand is encoded in the immediate - operand. */ - source = 2; - reg_slot = 1; - } - else - { - /* VexW1 is set, the second operand is the source and - the third operand is encoded in the immediate - operand. */ - source = 1; - reg_slot = 2; - } - if (i.tm.opcode_modifier.immext) { /* When ImmExt is set, the immediate byte is the last