From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Thu, 15 Mar 2018 17:45:10 +0000 (+0000)
Subject: [X86][Btver2] Attach AES/CLMUL instructions to a scheduler pipe
X-Git-Tag: llvmorg-7.0.0-rc1~10482
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=48b758e8ad14a5553326eaf3b2365b73162c6a24;p=platform%2Fupstream%2Fllvm.git

[X86][Btver2] Attach AES/CLMUL instructions to a scheduler pipe

llvm-svn: 327650
---

diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
index 854ea4d..bc777c2 100644
--- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
@@ -308,9 +308,9 @@ defm : JWriteResFpuPair<WritePCmpEStrM, [JFPU1, JLAGU, JFPU01, JFPU1, JFPU0], 14
 // AES Instructions.
 ////////////////////////////////////////////////////////////////////////////////
 
-defm : JWriteResFpuPair<WriteAESIMC,    [JVIMUL], 2>;
-defm : JWriteResFpuPair<WriteAESKeyGen, [JVIMUL], 2>;
-defm : JWriteResFpuPair<WriteAESDecEnc, [JVIMUL], 3>;
+defm : JWriteResFpuPair<WriteAESIMC,      [JFPU0, JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteAESKeyGen,   [JFPU0, JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteAESDecEnc,   [JFPU0, JVIMUL], 3>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Horizontal add/sub  instructions.
@@ -335,7 +335,7 @@ def : InstRW<[JWriteFHAddYLd], (instrs VHADDPDYrm, VHADDPSYrm, VHSUBPDYrm, VHSUB
 // Carry-less multiplication instructions.
 ////////////////////////////////////////////////////////////////////////////////
 
-defm : JWriteResFpuPair<WriteCLMul,     [JVIMUL], 2>;
+defm : JWriteResFpuPair<WriteCLMul,       [JFPU0, JVIMUL], 2>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // SSE4.1 instructions.