From: Puyan Lotfi Date: Mon, 13 Jan 2020 18:30:20 +0000 (-0500) Subject: [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. X-Git-Tag: llvmorg-11-init~224 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29;p=platform%2Fupstream%2Fllvm.git [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. This patch makes it so that cases where multiple instructions that differ only in their FrameIndex MachineOperand values no longer collide. For instance: %1:_(p0) = G_FRAME_INDEX %stack.0 %2:_(p0) = G_FRAME_INDEX %stack.1 Prior to this patch these instructions would collide together. Differential Revision: https://reviews.llvm.org/D71583 --- diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp index d0670dc..fcc40b2 100644 --- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp +++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp @@ -68,6 +68,8 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { return MO.getImm(); case MachineOperand::MO_TargetIndex: return MO.getOffset() | (MO.getTargetFlags() << 16); + case MachineOperand::MO_FrameIndex: + return llvm::hash_value(MO); // We could explicitly handle all the types of the MachineOperand, // here but we can just return a common number until we find a @@ -77,7 +79,6 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) { // TODO: Handle the following Index/ID/Predicate cases. They can // be hashed on in a stable manner. - case MachineOperand::MO_FrameIndex: case MachineOperand::MO_ConstantPoolIndex: case MachineOperand::MO_JumpTableIndex: case MachineOperand::MO_CFIIndex: diff --git a/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir b/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir new file mode 100644 index 0000000..6815856 --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir @@ -0,0 +1,23 @@ +# RUN: llc -mtriple x86_64-linux-gnu -run-pass mir-canonicalizer -verify-machineinstrs %s -o - | FileCheck %s + +... +--- +name: f +stack: + - { id: 0, size: 4 } + - { id: 1, size: 4 } +fixedStack: + - { id: 0, offset: 0, size: 4 } + - { id: 1, offset: 0, size: 4 } +body: | + bb.1: + ; CHECK: _1:_(p0) = G_FRAME_INDEX %stack.{{[0-1]}} + ; CHECK: _1:_(p0) = G_FRAME_INDEX %stack.{{[0-1]}} + ; CHECK: _1:gr32 = MOV32rm %fixed-stack.{{[0-1]}} + ; CHECK: _1:gr32 = MOV32rm %fixed-stack.{{[0-1]}} + %1:_(p0) = G_FRAME_INDEX %stack.0 + %2:_(p0) = G_FRAME_INDEX %stack.1 + %3:gr32 = MOV32rm %fixed-stack.0, 1, _, 0, _ + %4:gr32 = MOV32rm %fixed-stack.1, 1, _, 0, _ + +...