From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Tue, 3 May 2022 14:28:38 +0000 (+0100)
Subject: [X86] load-local-v3i129.ll - add checks for targets with fast/slow shld funnel shift ops
X-Git-Tag: upstream/15.0.7~8766
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4779d6cca20c59089615ac98620e85f1288c16f9;p=platform%2Fupstream%2Fllvm.git

[X86] load-local-v3i129.ll - add checks for targets with fast/slow shld funnel shift ops
---

diff --git a/llvm/test/CodeGen/X86/load-local-v3i129.ll b/llvm/test/CodeGen/X86/load-local-v3i129.ll
index b88e7a0..f339891 100644
--- a/llvm/test/CodeGen/X86/load-local-v3i129.ll
+++ b/llvm/test/CodeGen/X86/load-local-v3i129.ll
@@ -1,20 +1,39 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=FAST-SHLD
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefix=SLOW-SHLD
 
 define void @_start() {
-; CHECK-LABEL: _start:
-; CHECK:       # %bb.0: # %Entry
-; CHECK-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
-; CHECK-NEXT:    movq -{{[0-9]+}}(%rsp), %rcx
-; CHECK-NEXT:    shrdq $2, %rcx, %rax
-; CHECK-NEXT:    shrq $2, %rcx
-; CHECK-NEXT:    leaq 1(,%rax,4), %rdx
-; CHECK-NEXT:    movq %rdx, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT:    shrdq $62, %rcx, %rax
-; CHECK-NEXT:    movq %rax, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT:    orq $-2, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT:    movq $-1, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT:    retq
+; FAST-SHLD-LABEL: _start:
+; FAST-SHLD:       # %bb.0: # %Entry
+; FAST-SHLD-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
+; FAST-SHLD-NEXT:    movq -{{[0-9]+}}(%rsp), %rcx
+; FAST-SHLD-NEXT:    shrdq $2, %rcx, %rax
+; FAST-SHLD-NEXT:    shrq $2, %rcx
+; FAST-SHLD-NEXT:    leaq 1(,%rax,4), %rdx
+; FAST-SHLD-NEXT:    movq %rdx, -{{[0-9]+}}(%rsp)
+; FAST-SHLD-NEXT:    shrdq $62, %rcx, %rax
+; FAST-SHLD-NEXT:    movq %rax, -{{[0-9]+}}(%rsp)
+; FAST-SHLD-NEXT:    orq $-2, -{{[0-9]+}}(%rsp)
+; FAST-SHLD-NEXT:    movq $-1, -{{[0-9]+}}(%rsp)
+; FAST-SHLD-NEXT:    retq
+;
+; SLOW-SHLD-LABEL: _start:
+; SLOW-SHLD:       # %bb.0: # %Entry
+; SLOW-SHLD-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
+; SLOW-SHLD-NEXT:    movq -{{[0-9]+}}(%rsp), %rcx
+; SLOW-SHLD-NEXT:    shrq $2, %rax
+; SLOW-SHLD-NEXT:    movq %rcx, %rdx
+; SLOW-SHLD-NEXT:    shlq $62, %rdx
+; SLOW-SHLD-NEXT:    orq %rax, %rdx
+; SLOW-SHLD-NEXT:    andq $-4, %rcx
+; SLOW-SHLD-NEXT:    leaq 1(,%rdx,4), %rax
+; SLOW-SHLD-NEXT:    movq %rax, -{{[0-9]+}}(%rsp)
+; SLOW-SHLD-NEXT:    shrq $62, %rdx
+; SLOW-SHLD-NEXT:    orq %rcx, %rdx
+; SLOW-SHLD-NEXT:    movq %rdx, -{{[0-9]+}}(%rsp)
+; SLOW-SHLD-NEXT:    orq $-2, -{{[0-9]+}}(%rsp)
+; SLOW-SHLD-NEXT:    movq $-1, -{{[0-9]+}}(%rsp)
+; SLOW-SHLD-NEXT:    retq
 Entry:
   %y = alloca <3 x i129>, align 4
   %L = load <3 x i129>, <3 x i129>* %y