From: Ehsan Amiri Date: Thu, 7 Apr 2016 15:30:55 +0000 (+0000) Subject: [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2 X-Git-Tag: llvmorg-3.9.0-rc1~9730 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4701a91e59270639341fde8f34eaf2773e1c74c6;p=platform%2Fupstream%2Fllvm.git [PPC] Enable transformations in PPCPassConfig::addIRPasses at O2 http://reviews.llvm.org/D18562 A large number of testcases has been modified so they pass after this test. One testcase is deleted, because I realized even after undoing the original change that was committed with this testcase, the testcase still passes. So I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll) is an arbitrary change to keep it passing. Given the original intention of the testcase, and the fact that fixing it will require some time to change the testcase, we concluded that this quick change will be enough. llvm-svn: 265683 --- diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 5d47e0e..3814b7e 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -318,7 +318,7 @@ void PPCPassConfig::addIRPasses() { if (UsePrefetching) addPass(createLoopDataPrefetchPass()); - if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) { + if (TM->getOptLevel() >= CodeGenOpt::Default && EnableGEPOpt) { // Call SeparateConstOffsetFromGEP pass to extract constants within indices // and lower a GEP with multiple indices to either arithmetic operations or // multiple GEPs with single index. diff --git a/llvm/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll b/llvm/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll index aae914e..3be596f 100644 --- a/llvm/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll +++ b/llvm/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=ppc64 | FileCheck %s +; RUN: llc < %s -march=ppc64 -O1 | FileCheck %s +; RUN: llc < %s -march=ppc64 | FileCheck --check-prefix=CHECK-OPT %s %struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] } %struct.__mutex_t = type { i32 } @@ -15,6 +16,24 @@ entry: ; CHECK: @foo ; CHECK: lwzx ; CHECK: blr +; CHECK-OPT: @foo +; CHECK-OPT: lwz +; CHECK-OPT: blr } +define signext i32 @test(i32* noalias nocapture readonly %b, i32 signext %n) { +entry: + %idxprom = sext i32 %n to i64 + %arrayidx = getelementptr inbounds i32, i32* %b, i64 %idxprom + %0 = load i32, i32* %arrayidx, align 4 + %mul = mul nsw i32 %0, 7 + ret i32 %mul + +; CHECK-OPT: @test +; CHECK-OPT: lwzx +; CHECK-OPT: blr + +} + + declare i32 @bork(...) diff --git a/llvm/test/CodeGen/PowerPC/2012-11-16-mischedcall.ll b/llvm/test/CodeGen/PowerPC/2012-11-16-mischedcall.ll index 35e3fdd..dbc521f 100644 --- a/llvm/test/CodeGen/PowerPC/2012-11-16-mischedcall.ll +++ b/llvm/test/CodeGen/PowerPC/2012-11-16-mischedcall.ll @@ -8,10 +8,10 @@ declare void @init() nounwind declare void @clock() nounwind -; CHECK: %entry +; CHECK: mflr 0 ; CHECK: fmr 31, 1 ; CHECK: bl init -define void @s332(double %t) nounwind { +define double @s332(double %t) nounwind { entry: tail call void @init() tail call void @clock() nounwind @@ -29,5 +29,7 @@ for.body4: ; preds = %for.cond2 L20: ; preds = %for.body4, %for.cond2 %index.0 = phi i32 [ -2, %for.cond2 ], [ %i.0, %for.body4 ] - unreachable + %index.d = sitofp i32 %index.0 to double + %retval = fadd double %t, %index.d + ret double %retval } diff --git a/llvm/test/CodeGen/PowerPC/bdzlr.ll b/llvm/test/CodeGen/PowerPC/bdzlr.ll index d650604..a7c5fa4 100644 --- a/llvm/test/CodeGen/PowerPC/bdzlr.ll +++ b/llvm/test/CodeGen/PowerPC/bdzlr.ll @@ -37,7 +37,8 @@ for.body: ; preds = %for.body.for.body_c %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body.for.body_crit_edge ] %tt = getelementptr inbounds %struct.lua_TValue.17.692, %struct.lua_TValue.17.692* %0, i64 %indvars.iv, i32 1 %1 = load i32, i32* %tt, align 4 - store i32 %1, i32* undef, align 4 + %2 = add i32 %1, %1 + store i32 %2, i32* %tt, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll index d07a11f..e3f6838 100644 --- a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll +++ b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll @@ -13,8 +13,9 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body, %for.body.lr.ph %i.018.in = phi i64 [ %n, %for.body.lr.ph ], [ %i.018, %for.body ] %i.018 = add i64 %i.018.in, -1 - %add.i = or i128 undef, undef - %div.i = udiv i128 %add.i, 0 + %jj = sext i64 %i.018 to i128 + %add.i = or i128 %jj, undef + %div.i = udiv i128 %add.i, %jj %conv3.i11 = trunc i128 %div.i to i64 store i64 %conv3.i11, i64* undef, align 8 %cmp = icmp eq i64 %i.018, 0 diff --git a/llvm/test/CodeGen/PowerPC/ctrloops.ll b/llvm/test/CodeGen/PowerPC/ctrloops.ll index fff9e20..f1ad58f 100644 --- a/llvm/test/CodeGen/PowerPC/ctrloops.ll +++ b/llvm/test/CodeGen/PowerPC/ctrloops.ll @@ -76,23 +76,22 @@ for.end: ; preds = %for.body, %entry @tls_var = external thread_local global i8 -define i32 @test4() { +define i32 @test4(i32 %inp) { entry: br label %for.body for.body: ; preds = %for.body, %entry - %phi = phi i32 [ %dec, %for.body ], [ undef, %entry ] + %phi = phi i32 [ %dec, %for.body ], [ %inp, %entry ] %load = ptrtoint i8* @tls_var to i32 + %val = add i32 %load, %phi %dec = add i32 %phi, -1 %cmp = icmp sgt i32 %phi, 1 br i1 %cmp, label %for.body, label %return return: ; preds = %for.body - ret i32 %load + ret i32 %val ; CHECK-LABEL: @test4 -; CHECK-NOT: mtctr -; CHECK: addi {{[0-9]+}} -; CHECK: cmpwi -; CHECK-NOT: bdnz -; CHECK: bgt +; CHECK: mtctr +; CHECK: bdnz +; CHECK: __tls_get_addr } diff --git a/llvm/test/CodeGen/PowerPC/ec-input.ll b/llvm/test/CodeGen/PowerPC/ec-input.ll index a57f69b..6ef93d2 100644 --- a/llvm/test/CodeGen/PowerPC/ec-input.ll +++ b/llvm/test/CodeGen/PowerPC/ec-input.ll @@ -17,7 +17,7 @@ target triple = "powerpc64-bgq-linux" declare void @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* nocapture, i8* nocapture readonly, ...) #0 ; Function Attrs: inlinehint nounwind -define void @_ZN4PAMI6Device2MU15ResourceManager46calculatePerCoreMUResourcesBasedOnAvailabilityEv() #1 align 2 { +define void @_ZN4PAMI6Device2MU15ResourceManager46calculatePerCoreMUResourcesBasedOnAvailabilityEv(i32 %inp32, i64 %inp64) #1 align 2 { ; CHECK-LABEL: @_ZN4PAMI6Device2MU15ResourceManager46calculatePerCoreMUResourcesBasedOnAvailabilityEv ; CHECK: sc @@ -32,7 +32,7 @@ for.cond2.preheader: ; preds = %if.end23.3, %entry %minFreeBatIdsPerCore.097 = phi i64 [ 32, %entry ], [ %numFreeBatIdsInGroup.0.minFreeBatIdsPerCore.0, %if.end23.3 ] %minFreeRecFifosPerCore.096 = phi i64 [ 16, %entry ], [ %minFreeRecFifosPerCore.1, %if.end23.3 ] %minFreeInjFifosPerCore.095 = phi i64 [ 32, %entry ], [ %numFreeInjFifosInGroup.0.minFreeInjFifosPerCore.0, %if.end23.3 ] - %cmp5 = icmp eq i32 undef, 0 + %cmp5 = icmp eq i32 %inp32, 0 br i1 %cmp5, label %if.end, label %if.then if.then: ; preds = %if.end23.2, %if.end23.1, %if.end23, %for.cond2.preheader @@ -41,7 +41,7 @@ if.then: ; preds = %if.end23.2, %if.end if.end: ; preds = %for.cond2.preheader %1 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv = zext i32 %1 to i64 - %2 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %indvars.iv, i64 %0, i64 undef) #2 + %2 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %indvars.iv, i64 %0, i64 %inp64) #2 %cmp10 = icmp eq i32 0, 0 br i1 %cmp10, label %if.end14, label %if.then11 @@ -50,11 +50,11 @@ if.then11: ; preds = %if.end.3, %if.end.2 if.end14: ; preds = %if.end %3 = load i32, i32* %numFreeResourcesInSubgroup, align 4 - %cmp19 = icmp eq i32 undef, 0 + %cmp19 = icmp eq i32 %inp32, 0 br i1 %cmp19, label %if.end23, label %if.then20 if.then20: ; preds = %if.end14.3, %if.end14.2, %if.end14.1, %if.end14 - %conv4.i65.lcssa = phi i32 [ undef, %if.end14 ], [ 0, %if.end14.1 ], [ %conv4.i65.2, %if.end14.2 ], [ %conv4.i65.3, %if.end14.3 ] + %conv4.i65.lcssa = phi i32 [ %inp32, %if.end14 ], [ 0, %if.end14.1 ], [ %conv4.i65.2, %if.end14.2 ], [ %conv4.i65.3, %if.end14.3 ] call void (%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i8*, ...) @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* undef, i8* getelementptr inbounds ([121 x i8], [121 x i8]* @.str236, i64 0, i64 0), i32 signext 2503) #3 call void (%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i8*, ...) @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* undef, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str294, i64 0, i64 0), i32 signext %conv4.i65.lcssa) #3 unreachable @@ -63,7 +63,7 @@ if.end23: ; preds = %if.end14 %conv15 = zext i32 %3 to i64 %4 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv24 = zext i32 %4 to i64 - %5 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1033, i64 0, i64 %0, i64 undef) #2 + %5 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1033, i64 0, i64 %0, i64 %inp64) #2 %cmp5.1 = icmp eq i32 0, 0 br i1 %cmp5.1, label %if.end.1, label %if.then @@ -74,8 +74,8 @@ if.end.1: ; preds = %if.end23 %6 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv.1 = zext i32 %6 to i64 %add.1 = add nuw nsw i64 %conv.1, %conv - %7 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 0, i64 %0, i64 undef) #2 - %cmp10.1 = icmp eq i32 undef, 0 + %7 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 0, i64 %0, i64 %inp64) #2 + %cmp10.1 = icmp eq i32 %inp32, 0 br i1 %cmp10.1, label %if.end14.1, label %if.then11 if.end14.1: ; preds = %if.end.1 @@ -89,20 +89,20 @@ if.end23.1: ; preds = %if.end14.1 %9 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv24.1 = zext i32 %9 to i64 %add25.1 = add nuw nsw i64 %conv24.1, %conv24 - %cmp5.2 = icmp eq i32 undef, 0 + %cmp5.2 = icmp eq i32 %inp32, 0 br i1 %cmp5.2, label %if.end.2, label %if.then if.end.2: ; preds = %if.end23.1 %10 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv.2 = zext i32 %10 to i64 %add.2 = add nuw nsw i64 %conv.2, %add.1 - %11 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 undef, i64 %0, i64 undef) #2 + %11 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %inp64, i64 %0, i64 %inp64) #2 %cmp10.2 = icmp eq i32 0, 0 br i1 %cmp10.2, label %if.end14.2, label %if.then11 if.end14.2: ; preds = %if.end.2 %12 = load i32, i32* %numFreeResourcesInSubgroup, align 4 - %13 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 undef, i64 %0, i64 0) #2 + %13 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 %inp64, i64 %0, i64 0) #2 %asmresult1.i64.2 = extractvalue { i64, i64, i64, i64 } %13, 1 %conv4.i65.2 = trunc i64 %asmresult1.i64.2 to i32 %cmp19.2 = icmp eq i32 %conv4.i65.2, 0 @@ -121,7 +121,7 @@ if.end.3: ; preds = %if.end23.2 %15 = load i32, i32* %numFreeResourcesInSubgroup, align 4 %conv.3 = zext i32 %15 to i64 %add.3 = add nuw nsw i64 %conv.3, %add.2 - %cmp10.3 = icmp eq i32 undef, 0 + %cmp10.3 = icmp eq i32 %inp32, 0 br i1 %cmp10.3, label %if.end14.3, label %if.then11 if.end14.3: ; preds = %if.end.3 diff --git a/llvm/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll b/llvm/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll index 7742ffe..569e4e6 100644 --- a/llvm/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll +++ b/llvm/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll @@ -2,9 +2,9 @@ target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-bgq-linux" -define linkonce_odr double @test1() { +define linkonce_odr double @test1(ppc_fp128 %input) { entry: - %conv6.i.i = fptosi ppc_fp128 undef to i64 + %conv6.i.i = fptosi ppc_fp128 %input to i64 %conv.i = sitofp i64 %conv6.i.i to double ret double %conv.i diff --git a/llvm/test/CodeGen/PowerPC/lbzux.ll b/llvm/test/CodeGen/PowerPC/lbzux.ll index 4bd9cb6..a8ca639 100644 --- a/llvm/test/CodeGen/PowerPC/lbzux.ll +++ b/llvm/test/CodeGen/PowerPC/lbzux.ll @@ -2,7 +2,7 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "powerpc64-unknown-linux-gnu" ; RUN: llc -disable-ppc-unaligned < %s | FileCheck %s -define fastcc void @allocateSpace(i1 %cond1, i1 %cond2) nounwind { +define fastcc void @allocateSpace(i1 %cond1, i1 %cond2, i32 %offset) nounwind { entry: %0 = load i8*, i8** undef, align 8 br i1 undef, label %return, label %lor.lhs.false @@ -19,14 +19,13 @@ if.then15: ; preds = %if.end7 while.cond: ; preds = %while.body, %if.then15 %idxprom17 = sext i32 0 to i64 %arrayidx18 = getelementptr inbounds i8, i8* %0, i64 %idxprom17 - %or = or i32 undef, undef br i1 %cond1, label %if.end71, label %while.body while.body: ; preds = %while.cond br i1 %cond2, label %while.cond, label %if.then45 if.then45: ; preds = %while.body - %idxprom48139 = zext i32 %or to i64 + %idxprom48139 = zext i32 %offset to i64 %arrayidx49 = getelementptr inbounds i8, i8* %0, i64 %idxprom48139 %1 = bitcast i8* %arrayidx49 to i16* %2 = bitcast i8* %arrayidx18 to i16* diff --git a/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll b/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll index 7831df1..17b05b2 100644 --- a/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll +++ b/llvm/test/CodeGen/PowerPC/lsr-postinc-pos.ll @@ -3,27 +3,27 @@ ; The icmp is a post-inc use, and the increment is in %bb11, but the ; scevgep needs to be inserted in %bb so that it is dominated by %t. -; CHECK: %t = load i8*, i8** undef +; CHECK: %t = load i8*, i8** %inp ; CHECK: %scevgep = getelementptr i8, i8* %t, i32 %lsr.iv.next -; CHECK: %c1 = icmp ult i8* %scevgep, undef +; CHECK: %c1 = icmp ult i8* %scevgep, %inp2 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" target triple = "powerpc-apple-darwin9" -define void @foo() nounwind { +define void @foo(i8** %inp, i8* %inp2) nounwind { entry: br label %bb11 bb11: %i = phi i32 [ 0, %entry ], [ %i.next, %bb ] ; [#uses=3] %ii = shl i32 %i, 2 ; [#uses=1] - %c0 = icmp eq i32 %i, undef ; [#uses=1] + %c0 = icmp eq i32 %i, 0 ; [#uses=1] br i1 %c0, label %bb13, label %bb bb: - %t = load i8*, i8** undef, align 16 ; [#uses=1] + %t = load i8*, i8** %inp, align 16 ; [#uses=1] %p = getelementptr i8, i8* %t, i32 %ii ; [#uses=1] - %c1 = icmp ult i8* %p, undef ; [#uses=1] + %c1 = icmp ult i8* %p, %inp2 ; [#uses=1] %i.next = add i32 %i, 1 ; [#uses=1] br i1 %c1, label %bb11, label %bb13 diff --git a/llvm/test/CodeGen/PowerPC/optcmp.ll b/llvm/test/CodeGen/PowerPC/optcmp.ll index d929eae..3f7522c 100644 --- a/llvm/test/CodeGen/PowerPC/optcmp.ll +++ b/llvm/test/CodeGen/PowerPC/optcmp.ll @@ -72,13 +72,13 @@ define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 { entry: %sub = sub nsw i64 %b, %a store i64 %sub, i64* %c, align 8 - %cmp = icmp eq i64 %a, %b + %cmp = icmp slt i64 %a, %b %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond ; CHECK: @foold ; CHECK: subf. [[REG:[0-9]+]], 3, 4 -; CHECK: isel 3, 3, 4, 2 +; CHECK: isel 3, 3, 4, 1 ; CHECK: std [[REG]], 0(5) } @@ -86,13 +86,13 @@ define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 { entry: %sub = sub nsw i64 %a, %b store i64 %sub, i64* %c, align 8 - %cmp = icmp eq i64 %a, %b + %cmp = icmp slt i64 %a, %b %cond = select i1 %cmp, i64 %a, i64 %b ret i64 %cond ; CHECK: @foold2 ; CHECK: subf. [[REG:[0-9]+]], 4, 3 -; CHECK: isel 3, 3, 4, 2 +; CHECK: isel 3, 3, 4, 0 ; CHECK: std [[REG]], 0(5) } diff --git a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll index 2f75190..7493d2f 100644 --- a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll +++ b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll @@ -169,7 +169,7 @@ declare i32 @something(...) ; CHECK-NEXT: bne 0, .[[LOOP]] ; ; Next BB -; CHECK: %for.exit +; CHECK: %for.end ; CHECK: mtlr {{[0-9]+}} ; CHECK-NEXT: blr define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) { diff --git a/llvm/test/CodeGen/PowerPC/ppc64-calls.ll b/llvm/test/CodeGen/PowerPC/ppc64-calls.ll index c134b66..8b49cdb 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-calls.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-calls.ll @@ -2,7 +2,8 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" -define void @foo() nounwind readnone noinline { + +define void @foo() nounwind noinline { ret void } diff --git a/llvm/test/CodeGen/PowerPC/pr25802.ll b/llvm/test/CodeGen/PowerPC/pr25802.ll index 0631850..99c6bfa 100644 --- a/llvm/test/CodeGen/PowerPC/pr25802.ll +++ b/llvm/test/CodeGen/PowerPC/pr25802.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s | FileCheck %s -; CHECK: .long .Ltmp6-.Ltmp12 # Call between .Ltmp12 and .Ltmp6 +; CHECK: .long .Ltmp9-.Ltmp8 # Call between .Ltmp8 and .Ltmp9 ; We used to crash in filetype=obj when computing a negative value. ; RUN: llc -filetype=obj < %s diff --git a/llvm/test/CodeGen/PowerPC/preincprep-invoke.ll b/llvm/test/CodeGen/PowerPC/preincprep-invoke.ll index 8dbce9a..6e97468 100644 --- a/llvm/test/CodeGen/PowerPC/preincprep-invoke.ll +++ b/llvm/test/CodeGen/PowerPC/preincprep-invoke.ll @@ -11,12 +11,12 @@ declare void @_ZN13CStdOutStream5FlushEv() declare i32 @__gxx_personality_v0(...) -define void @_Z11GetPasswordP13CStdOutStreamb() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { +define void @_Z11GetPasswordP13CStdOutStreamb(i1 %cond, i8 %arg1, i8* %arg2) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { entry: br label %for.cond.i.i for.cond.i.i: ; preds = %for.cond.i.i, %entry - br i1 undef, label %_ZN11CStringBaseIcEC2EPKc.exit.critedge, label %for.cond.i.i + br i1 %cond, label %_ZN11CStringBaseIcEC2EPKc.exit.critedge, label %for.cond.i.i _ZN11CStringBaseIcEC2EPKc.exit.critedge: ; preds = %for.cond.i.i invoke void @_ZN13CStdOutStreamlsEPKc() @@ -37,11 +37,13 @@ for.cond.i.i30: ; preds = %for.cond.i.i30, %in %indvars.iv.i.i26 = phi i64 [ %indvars.iv.next.i.i29, %for.cond.i.i30 ], [ 0, %invoke.cont4 ] %arrayidx.i.i27 = getelementptr inbounds i8, i8* %call7, i64 %indvars.iv.i.i26 %0 = load i8, i8* %arrayidx.i.i27, align 1 + %1 = add i8 %0, %arg1 + store i8 %1, i8* %arg2, align 1 %indvars.iv.next.i.i29 = add nuw nsw i64 %indvars.iv.i.i26, 1 br label %for.cond.i.i30 lpad: ; preds = %invoke.cont4, %invoke.cont, %_ZN11CStringBaseIcEC2EPKc.exit.critedge - %1 = landingpad { i8*, i32 } + %2 = landingpad { i8*, i32 } cleanup resume { i8*, i32 } undef } diff --git a/llvm/test/CodeGen/PowerPC/qpx-bv-sint.ll b/llvm/test/CodeGen/PowerPC/qpx-bv-sint.ll index 0bc14ed..9682e75 100644 --- a/llvm/test/CodeGen/PowerPC/qpx-bv-sint.ll +++ b/llvm/test/CodeGen/PowerPC/qpx-bv-sint.ll @@ -2,13 +2,13 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "powerpc64-bgq-linux" ; RUN: llc < %s -march=ppc64 -mcpu=a2q | FileCheck %s -define void @s452() nounwind { +define void @s452(i32 %inp1) nounwind { entry: br label %for.body4 for.body4: ; preds = %for.body4, %entry - %conv.4 = sitofp i32 undef to double - %conv.5 = sitofp i32 undef to double + %conv.4 = sitofp i32 %inp1 to double + %conv.5 = sitofp i32 %inp1 to double %mul.4.v.i0.1 = insertelement <2 x double> undef, double %conv.4, i32 0 %mul.4.v.i0.2 = insertelement <2 x double> %mul.4.v.i0.1, double %conv.5, i32 1 %mul.4 = fmul <2 x double> %mul.4.v.i0.2, undef diff --git a/llvm/test/CodeGen/PowerPC/qpx-s-sel.ll b/llvm/test/CodeGen/PowerPC/qpx-s-sel.ll index 09a615c..6481fc6 100644 --- a/llvm/test/CodeGen/PowerPC/qpx-s-sel.ll +++ b/llvm/test/CodeGen/PowerPC/qpx-s-sel.ll @@ -1,7 +1,6 @@ ; RUN: llc < %s -march=ppc64 -mcpu=a2q | FileCheck %s target triple = "powerpc64-bgq-linux" -@Q = constant <4 x i1> , align 16 @R = global <4 x i1> , align 16 define <4 x float> @test1(<4 x float> %a, <4 x float> %b, <4 x i1> %c) nounwind readnone { @@ -44,9 +43,9 @@ entry: ; blr } -define <4 x i1> @test4(<4 x i1> %a) nounwind { +define <4 x i1> @test4(<4 x i1> %a, <4 x i1>* %t) nounwind { entry: - %q = load <4 x i1>, <4 x i1>* @Q, align 16 + %q = load <4 x i1>, <4 x i1>* %t, align 16 %v = and <4 x i1> %a, %q ret <4 x i1> %v diff --git a/llvm/test/CodeGen/PowerPC/qpx-sel.ll b/llvm/test/CodeGen/PowerPC/qpx-sel.ll index a375e6e..4b23df3 100644 --- a/llvm/test/CodeGen/PowerPC/qpx-sel.ll +++ b/llvm/test/CodeGen/PowerPC/qpx-sel.ll @@ -1,7 +1,6 @@ ; RUN: llc < %s -march=ppc64 -mcpu=a2q | FileCheck %s target triple = "powerpc64-bgq-linux" -@Q = constant <4 x i1> , align 16 @R = global <4 x i1> , align 16 define <4 x double> @test1(<4 x double> %a, <4 x double> %b, <4 x i1> %c) nounwind readnone { @@ -48,9 +47,9 @@ entry: ; blr } -define <4 x i1> @test4(<4 x i1> %a) nounwind { +define <4 x i1> @test4(<4 x i1> %a, <4 x i1>* %t) nounwind { entry: - %q = load <4 x i1>, <4 x i1>* @Q, align 16 + %q = load <4 x i1>, <4 x i1>* %t, align 16 %v = and <4 x i1> %a, %q ret <4 x i1> %v diff --git a/llvm/test/CodeGen/PowerPC/qpx-split-vsetcc.ll b/llvm/test/CodeGen/PowerPC/qpx-split-vsetcc.ll index c8cef0f..5bda3f6 100644 --- a/llvm/test/CodeGen/PowerPC/qpx-split-vsetcc.ll +++ b/llvm/test/CodeGen/PowerPC/qpx-split-vsetcc.ll @@ -3,27 +3,18 @@ target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-bgq-linux" ; Function Attrs: nounwind -define void @gsl_sf_legendre_Pl_deriv_array() #0 { +define void @gsl_sf_legendre_Pl_deriv_array(<4 x i32> %inp1, <4 x double> %inp2) #0 { entry: - br i1 undef, label %do.body.i, label %if.else.i - -do.body.i: ; preds = %entry - unreachable - -if.else.i: ; preds = %entry - br i1 undef, label %return, label %for.body46.lr.ph - -for.body46.lr.ph: ; preds = %if.else.i br label %vector.body198 vector.body198: ; preds = %vector.body198, %for.body46.lr.ph - %0 = icmp ne <4 x i32> undef, zeroinitializer + %0 = icmp ne <4 x i32> %inp1, zeroinitializer %1 = select <4 x i1> %0, <4 x double> , <4 x double> - %2 = fmul <4 x double> undef, %1 - %3 = fmul <4 x double> undef, %2 - %4 = fmul <4 x double> %3, undef + %2 = fmul <4 x double> %inp2, %1 + %3 = fmul <4 x double> %inp2, %2 + %4 = fmul <4 x double> %3, %inp2 store <4 x double> %4, <4 x double>* undef, align 8 - br label %vector.body198 + br label %return ; CHECK-LABEL: @gsl_sf_legendre_Pl_deriv_array ; CHECK: qvlfiwzx diff --git a/llvm/test/CodeGen/PowerPC/stwux.ll b/llvm/test/CodeGen/PowerPC/stwux.ll index 2ed630d..4f83c9f 100644 --- a/llvm/test/CodeGen/PowerPC/stwux.ll +++ b/llvm/test/CodeGen/PowerPC/stwux.ll @@ -4,7 +4,7 @@ target triple = "powerpc64-unknown-linux-gnu" @multvec_i = external unnamed_addr global [100 x i32], align 4 -define fastcc void @subs_STMultiExceptIntern() nounwind { +define fastcc void @subs_STMultiExceptIntern(i32 %input) nounwind { entry: br i1 undef, label %while.body.lr.ph, label %return @@ -16,10 +16,11 @@ while.body: ; preds = %if.end12, %while.bo br i1 undef, label %if.end12, label %if.then if.then: ; preds = %while.body + %0 = add i32 %input, 1 br label %if.end12 if.end12: ; preds = %if.then, %while.body - %i.1 = phi i32 [ %i.0240, %while.body ], [ undef, %if.then ] + %i.1 = phi i32 [ %i.0240, %while.body ], [ %0, %if.then ] br i1 undef, label %while.body, label %while.end while.end: ; preds = %if.end12 diff --git a/llvm/test/CodeGen/PowerPC/subreg-postra-2.ll b/llvm/test/CodeGen/PowerPC/subreg-postra-2.ll index 0515364..5471b11 100644 --- a/llvm/test/CodeGen/PowerPC/subreg-postra-2.ll +++ b/llvm/test/CodeGen/PowerPC/subreg-postra-2.ll @@ -3,158 +3,30 @@ target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: nounwind -define void @jbd2_journal_commit_transaction() #0 { +define void @jbd2_journal_commit_transaction(i32 %input1, i32* %input2, i32* %input3, i8** %input4) #0 { entry: - br i1 undef, label %do.body, label %if.then5 - -if.then5: ; preds = %entry - unreachable - -do.body: ; preds = %entry - br i1 undef, label %do.body.i, label %trace_jbd2_start_commit.exit - -do.body.i: ; preds = %do.body - unreachable - -trace_jbd2_start_commit.exit: ; preds = %do.body - br i1 undef, label %do.body.i1116, label %trace_jbd2_commit_locking.exit - -do.body.i1116: ; preds = %trace_jbd2_start_commit.exit - unreachable - -trace_jbd2_commit_locking.exit: ; preds = %trace_jbd2_start_commit.exit - br i1 undef, label %while.end, label %while.body.lr.ph - -while.body.lr.ph: ; preds = %trace_jbd2_commit_locking.exit - unreachable - -while.end: ; preds = %trace_jbd2_commit_locking.exit - br i1 undef, label %spin_unlock.exit1146, label %if.then.i.i.i.i1144 - -if.then.i.i.i.i1144: ; preds = %while.end - unreachable - -spin_unlock.exit1146: ; preds = %while.end - br i1 undef, label %spin_unlock.exit1154, label %if.then.i.i.i.i1152 - -if.then.i.i.i.i1152: ; preds = %spin_unlock.exit1146 - unreachable - -spin_unlock.exit1154: ; preds = %spin_unlock.exit1146 - br i1 undef, label %do.body.i1159, label %trace_jbd2_commit_flushing.exit - -do.body.i1159: ; preds = %spin_unlock.exit1154 - br i1 undef, label %if.end.i1166, label %do.body5.i1165 - -do.body5.i1165: ; preds = %do.body.i1159 - unreachable - -if.end.i1166: ; preds = %do.body.i1159 - unreachable - -trace_jbd2_commit_flushing.exit: ; preds = %spin_unlock.exit1154 - br i1 undef, label %for.end.i, label %for.body.lr.ph.i - -for.body.lr.ph.i: ; preds = %trace_jbd2_commit_flushing.exit - unreachable - -for.end.i: ; preds = %trace_jbd2_commit_flushing.exit - br i1 undef, label %journal_submit_data_buffers.exit, label %if.then.i.i.i.i31.i - -if.then.i.i.i.i31.i: ; preds = %for.end.i - br label %journal_submit_data_buffers.exit - -journal_submit_data_buffers.exit: ; preds = %if.then.i.i.i.i31.i, %for.end.i - br i1 undef, label %if.end103, label %if.then102 - -if.then102: ; preds = %journal_submit_data_buffers.exit - unreachable - -if.end103: ; preds = %journal_submit_data_buffers.exit - br i1 undef, label %do.body.i1182, label %trace_jbd2_commit_logging.exit - -do.body.i1182: ; preds = %if.end103 - br i1 undef, label %if.end.i1189, label %do.body5.i1188 - -do.body5.i1188: ; preds = %do.body5.i1188, %do.body.i1182 - br i1 undef, label %if.end.i1189, label %do.body5.i1188 - -if.end.i1189: ; preds = %do.body5.i1188, %do.body.i1182 - unreachable - -trace_jbd2_commit_logging.exit: ; preds = %if.end103 - br label %while.cond129.outer1451 - -while.cond129.outer1451: ; preds = %start_journal_io, %trace_jbd2_commit_logging.exit - br label %while.cond129 - -while.cond129: ; preds = %if.then135, %while.cond129.outer1451 - br i1 undef, label %while.end246, label %if.then135 - -if.then135: ; preds = %while.cond129 - br i1 undef, label %start_journal_io, label %while.cond129 - -start_journal_io: ; preds = %if.then135 - br label %while.cond129.outer1451 - -while.end246: ; preds = %while.cond129 - br i1 undef, label %for.end.i1287, label %for.body.i1277 - -for.body.i1277: ; preds = %while.end246 - unreachable - -for.end.i1287: ; preds = %while.end246 - br i1 undef, label %journal_finish_inode_data_buffers.exit, label %if.then.i.i.i.i84.i - -if.then.i.i.i.i84.i: ; preds = %for.end.i1287 - unreachable - -journal_finish_inode_data_buffers.exit: ; preds = %for.end.i1287 - br i1 undef, label %if.end256, label %if.then249 - -if.then249: ; preds = %journal_finish_inode_data_buffers.exit - unreachable - -if.end256: ; preds = %journal_finish_inode_data_buffers.exit - br label %while.body318 - -while.body318: ; preds = %wait_on_buffer.exit, %if.end256 - br i1 undef, label %wait_on_buffer.exit, label %if.then.i1296 - -if.then.i1296: ; preds = %while.body318 - br label %wait_on_buffer.exit - -wait_on_buffer.exit: ; preds = %if.then.i1296, %while.body318 - br i1 undef, label %do.body378, label %while.body318 - -do.body378: ; preds = %wait_on_buffer.exit - br i1 undef, label %while.end418, label %while.body392.lr.ph - -while.body392.lr.ph: ; preds = %do.body378 br label %while.body392 while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph - %0 = load i8*, i8** undef, align 8 + %0 = load i8*, i8** %input4, align 8 %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* - %tobool.i1316 = icmp eq i64 undef, 0 - br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %if.then.i1317 - -if.then.i1317: ; preds = %while.body392 - unreachable + %ivar = add i32 %input1, 1 + %tobool.i1316 = icmp eq i32 %input1, 0 + br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %while.end418 wait_on_buffer.exit1319: ; preds = %while.body392 %1 = load volatile i64, i64* %b_state.i.i1314, align 8 %conv.i.i1322 = and i64 %1, 1 %lnot404 = icmp eq i64 %conv.i.i1322, 0 - %.err.4 = select i1 %lnot404, i32 -5, i32 undef + %.err.4 = select i1 %lnot404, i32 -5, i32 %input1 %2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #0 - store i8* %0, i8** undef, align 8 - %cmp.i1312 = icmp eq i32* undef, undef + store i8* %0, i8** %input4, align 8 + %cmp.i1312 = icmp eq i32* %input2, %input3 br i1 %cmp.i1312, label %while.end418, label %while.body392 while.end418: ; preds = %wait_on_buffer.exit1319, %do.body378 - %err.4.lcssa = phi i32 [ undef, %do.body378 ], [ %.err.4, %wait_on_buffer.exit1319 ] + %err.4.lcssa = phi i32 [ %ivar, %while.body392 ], [ %.err.4, %wait_on_buffer.exit1319 ] %tobool419 = icmp eq i32 %err.4.lcssa, 0 br i1 %tobool419, label %if.end421, label %if.then420 @@ -169,6 +41,7 @@ if.then420: ; preds = %while.end418 if.end421: ; preds = %while.end418 unreachable + } attributes #0 = { nounwind } diff --git a/llvm/test/CodeGen/PowerPC/subreg-postra.ll b/llvm/test/CodeGen/PowerPC/subreg-postra.ll index ba1b967..b9f1746 100644 --- a/llvm/test/CodeGen/PowerPC/subreg-postra.ll +++ b/llvm/test/CodeGen/PowerPC/subreg-postra.ll @@ -3,7 +3,10 @@ target datalayout = "E-m:e-i64:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" ; Function Attrs: nounwind -define void @jbd2_journal_commit_transaction(i32* %journal) #0 { +define void @jbd2_journal_commit_transaction(i32* %journal, i64 %inp1, i32 %inp2, + i32* %inp3, i32** %inp4, + i32** %inp5, i1 %inp6, + i1 %inp7, i1 %inp8) #0 { entry: br i1 undef, label %do.body, label %if.then5 @@ -104,17 +107,17 @@ do.body277: ; preds = %if.then260, %if.end br label %while.body318 while.body318: ; preds = %wait_on_buffer.exit, %do.body277 - %tobool.i1295 = icmp eq i64 undef, 0 + %tobool.i1295 = icmp eq i64 %inp1, 0 br i1 %tobool.i1295, label %wait_on_buffer.exit, label %if.then.i1296 if.then.i1296: ; preds = %while.body318 unreachable wait_on_buffer.exit: ; preds = %while.body318 - br i1 undef, label %do.body378, label %while.body318 + br i1 %inp6, label %do.body378, label %while.body318 do.body378: ; preds = %wait_on_buffer.exit - br i1 undef, label %while.end418, label %while.body392.lr.ph + br i1 %inp7, label %while.end418, label %while.body392.lr.ph while.body392.lr.ph: ; preds = %do.body378 br label %while.body392 @@ -123,7 +126,7 @@ while.body392: ; preds = %wait_on_buffer.exit %0 = load i8*, i8** undef, align 8 %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* - %tobool.i1316 = icmp eq i64 undef, 0 + %tobool.i1316 = icmp eq i64 %inp1, 0 br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %if.then.i1317 if.then.i1317: ; preds = %while.body392 @@ -133,23 +136,23 @@ wait_on_buffer.exit1319: ; preds = %while.body392 %1 = load volatile i64, i64* %b_state.i.i1314, align 8 %conv.i.i1322 = and i64 %1, 1 %lnot404 = icmp eq i64 %conv.i.i1322, 0 - %.err.4 = select i1 %lnot404, i32 -5, i32 undef + %.err.4 = select i1 %lnot404, i32 -5, i32 %inp2 %2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #1 %prev.i.i.i1325 = getelementptr inbounds i8, i8* %0, i64 8 - %3 = load i32*, i32** null, align 8 - store i32* %3, i32** undef, align 8 - call void @__brelse(i32* undef) #1 - br i1 undef, label %while.end418, label %while.body392 + %3 = load i32*, i32** %inp4, align 8 + store i32* %3, i32** %inp5, align 8 + call void @__brelse(i32* %3) #1 + br i1 %inp8, label %while.end418, label %while.body392 ; CHECK-LABEL: @jbd2_journal_commit_transaction ; CHECK: andi. -; CHECK: crmove [[REG:[0-9]+]], 1 +; CHECK: crmove ; CHECK: stdcx. -; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, [[REG]] +; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, while.end418: ; preds = %wait_on_buffer.exit1319, %do.body378 - %err.4.lcssa = phi i32 [ undef, %do.body378 ], [ %.err.4, %wait_on_buffer.exit1319 ] - br i1 undef, label %if.end421, label %if.then420 + %err.4.lcssa = phi i32 [ %inp2, %do.body378 ], [ %.err.4, %wait_on_buffer.exit1319 ] + br i1 %inp7, label %if.end421, label %if.then420 if.then420: ; preds = %while.end418 call void @jbd2_journal_abort(i32* %journal, i32 signext %err.4.lcssa) #1 diff --git a/llvm/test/CodeGen/PowerPC/subsumes-pred-regs.ll b/llvm/test/CodeGen/PowerPC/subsumes-pred-regs.ll deleted file mode 100644 index 5389c13..0000000 --- a/llvm/test/CodeGen/PowerPC/subsumes-pred-regs.ll +++ /dev/null @@ -1,65 +0,0 @@ -; RUN: llc < %s -mcpu=ppc64 -mattr=-crbits | FileCheck %s -target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" -target triple = "powerpc64-unknown-linux-gnu" - -; Function Attrs: nounwind -define zeroext i1 @test1() unnamed_addr #0 align 2 { - -; CHECK-LABEL: @test1 - -entry: - br i1 undef, label %lor.end, label %lor.rhs - -lor.rhs: ; preds = %entry - unreachable - -lor.end: ; preds = %entry - br i1 undef, label %land.rhs, label %if.then - -if.then: ; preds = %lor.end - br i1 undef, label %return, label %if.end.i24 - -if.end.i24: ; preds = %if.then - %0 = load i32, i32* undef, align 4 - %lnot.i.i16.i23 = icmp eq i32 %0, 0 - br i1 %lnot.i.i16.i23, label %if.end7.i37, label %test.exit27.i34 - -test.exit27.i34: ; preds = %if.end.i24 - br i1 undef, label %return, label %if.end7.i37 - -if.end7.i37: ; preds = %test.exit27.i34, %if.end.i24 - %tobool.i.i36 = icmp eq i8 undef, 0 - br i1 %tobool.i.i36, label %return, label %if.then9.i39 - -if.then9.i39: ; preds = %if.end7.i37 - br i1 %lnot.i.i16.i23, label %return, label %lor.rhs.i.i49 - -; CHECK: .LBB0_7: -; CHECK: bne 1, .LBB0_10 -; CHECK: beq 0, .LBB0_10 -; CHECK: .LBB0_9: - -lor.rhs.i.i49: ; preds = %if.then9.i39 - %cmp.i.i.i.i48 = icmp ne i64 undef, 0 - br label %return - -land.rhs: ; preds = %lor.end - br i1 undef, label %return, label %if.end.i - -if.end.i: ; preds = %land.rhs - br i1 undef, label %return, label %if.then9.i - -if.then9.i: ; preds = %if.end.i - br i1 undef, label %return, label %lor.rhs.i.i - -lor.rhs.i.i: ; preds = %if.then9.i - %cmp.i.i.i.i = icmp ne i64 undef, 0 - br label %return - -return: ; preds = %lor.rhs.i.i, %if.then9.i, %if.end.i, %land.rhs, %lor.rhs.i.i49, %if.then9.i39, %if.end7.i37, %test.exit27.i34, %if.then - %retval.0 = phi i1 [ false, %if.then ], [ false, %test.exit27.i34 ], [ true, %if.end7.i37 ], [ true, %if.then9.i39 ], [ %cmp.i.i.i.i48, %lor.rhs.i.i49 ], [ false, %land.rhs ], [ true, %if.end.i ], [ true, %if.then9.i ], [ %cmp.i.i.i.i, %lor.rhs.i.i ] - ret i1 %retval.0 -} - -attributes #0 = { nounwind } - diff --git a/llvm/test/CodeGen/PowerPC/svr4-redzone.ll b/llvm/test/CodeGen/PowerPC/svr4-redzone.ll index bee3ac3..a72ac10 100644 --- a/llvm/test/CodeGen/PowerPC/svr4-redzone.ll +++ b/llvm/test/CodeGen/PowerPC/svr4-redzone.ll @@ -2,10 +2,10 @@ ; RUN: llc -mtriple="powerpc64-unknown-linux-gnu" < %s | FileCheck %s --check-prefix=PPC64 ; PR15332 -define void @regalloc() nounwind { +define i32 @regalloc() nounwind { entry: - %0 = add i32 1, 2 - ret void + %0 = add i32 1, 2 + ret i32 %0 } ; PPC32-LABEL: regalloc: ; PPC32-NOT: stwu 1, -{{[0-9]+}}(1) @@ -15,10 +15,10 @@ entry: ; PPC64-NOT: stdu 1, -{{[0-9]+}}(1) ; PPC64: blr -define void @smallstack() nounwind { +define i8* @smallstack() nounwind { entry: - %0 = alloca i8, i32 4 - ret void + %0 = alloca i8, i32 4 + ret i8* %0 } ; PPC32-LABEL: smallstack: ; PPC32: stwu 1, -16(1) @@ -27,10 +27,10 @@ entry: ; PPC64-NOT: stdu 1, -{{[0-9]+}}(1) ; PPC64: blr -define void @bigstack() nounwind { +define i8* @bigstack() nounwind { entry: - %0 = alloca i8, i32 230 - ret void + %0 = alloca i8, i32 230 + ret i8* %0 } ; PPC32-LABEL: bigstack: ; PPC32: stwu 1, -240(1) diff --git a/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll b/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll index 4a23598..5ce7dfc 100644 --- a/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll +++ b/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll @@ -9,24 +9,19 @@ @tls_var = external thread_local global %struct1.2.41*, align 8 -define void @foo_test() { +define i32 @foo_test() { %1 = load %struct1.2.41*, %struct1.2.41** @tls_var, align 8 - br i1 undef, label %foo.exit, label %2 -;