From: Benjamin Kramer <benny.kra@googlemail.com>
Date: Thu, 10 May 2018 11:45:18 +0000 (+0000)
Subject: [InstCombine] Only propagate known leading zeros from udiv input to output.
X-Git-Tag: llvmorg-7.0.0-rc1~6350
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=456f473ea8f2ca7b85773ba09140c5862f9c3ad7;p=platform%2Fupstream%2Fllvm.git

[InstCombine] Only propagate known leading zeros from udiv input to output.

Put in a conservatively correct estimate for now. Avoids miscompiling
clang in FDO mode. This is really tricky to trigger in reality as
basically all interesting cases will be folded away by computeKnownBits
earlier, I was unable to find a reasonably small test case.

llvm-svn: 331975
---

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index abd3e39..a475a27 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -554,10 +554,15 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
         break;
 
       // FIXME: Take the demanded mask of the result into account.
+      unsigned RHSTrailingZeros = SA->countTrailingZeros();
       APInt DemandedMaskIn =
-          APInt::getHighBitsSet(BitWidth, BitWidth - SA->countTrailingZeros());
-      if (SimplifyDemandedBits(I, 0, DemandedMaskIn, Known, Depth + 1))
+          APInt::getHighBitsSet(BitWidth, BitWidth - RHSTrailingZeros);
+      if (SimplifyDemandedBits(I, 0, DemandedMaskIn, LHSKnown, Depth + 1))
         return I;
+
+      // Propagate zero bits from the input.
+      Known.Zero.setHighBits(std::min(
+          BitWidth, LHSKnown.Zero.countLeadingOnes() + RHSTrailingZeros));
     }
     break;
   }