From: Dmitry Osipenko <digetx@gmail.com>
Date: Wed, 12 Dec 2018 20:38:55 +0000 (+0300)
Subject: memory: tegra: Use relaxed versions of readl/writel
X-Git-Tag: v5.4-rc1~1382^2~1^3~12
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=45594c683ef780f20f11b1e0018b933b6ff5d9a1;p=platform%2Fkernel%2Flinux-rpi.git

memory: tegra: Use relaxed versions of readl/writel

There is no need for inserting of memory barriers to access registers of
Memory Controller. Hence use the relaxed versions of the accessors.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---

diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index 9856f08..887a3b07 100644
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -26,13 +26,13 @@
 
 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
 {
-	return readl(mc->regs + offset);
+	return readl_relaxed(mc->regs + offset);
 }
 
 static inline void mc_writel(struct tegra_mc *mc, u32 value,
 			     unsigned long offset)
 {
-	writel(value, mc->regs + offset);
+	writel_relaxed(value, mc->regs + offset);
 }
 
 extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common;