From: Aswath Govindraju <a-govindraju@ti.com>
Date: Wed, 16 Jun 2021 17:12:23 +0000 (+0530)
Subject: arm64: dts: ti: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication
X-Git-Tag: v5.15~746^2~6^2~5
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=454a9d4aaacb89daea350d21628992bb83de649f;p=platform%2Fkernel%2Flinux-starfive.git

arm64: dts: ti: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication

The final 128KB in SRAM is reserved by default for DMSC-lite code and
secure proxy communication buffer. The memory region used for DMSC-lite
code can be optionally freed up by secure firmware API[1]. However, the
buffer for secure proxy communication is not configurable. This default
hardware configuration is unique for AM64.

Therefore, indicate the area reserved for DMSC-lite code and secure proxy
communication buffer in the oc_sram device tree node.

[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210616171224.24635-3-a-govindraju@ti.com
---

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index e918afc..27888ee6 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -27,6 +27,14 @@
 		tfa-sram@0 {
 			reg = <0x0 0x20000>;
 		};
+
+		dmsc-sram@1e0000 {
+			reg = <0x1e0000 0x1c000>;
+		};
+
+		sproxy-sram@1fc000 {
+			reg = <0x1fc000 0x4000>;
+		};
 	};
 
 	main_conf: syscon@43000000 {