From: Bjorn Helgaas <bhelgaas@google.com>
Date: Mon, 12 Dec 2016 17:25:11 +0000 (-0600)
Subject: Merge branch 'pci/host-rockchip' into next
X-Git-Tag: v4.14-rc1~1865^2~3
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=44b83b32e7c8d6fcd6a7e877ce3db65f6afdf87c;p=platform%2Fkernel%2Flinux-rpi.git

Merge branch 'pci/host-rockchip' into next

* pci/host-rockchip:
  PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
  PCI: rockchip: Split out rockchip_cfg_atu()
  PCI: rockchip: Clean up bit definitions for PCIE_RC_CONFIG_LCS
  PCI: rockchip: Correct the use of FTS mask
  PCI: rockchip: Remove the pointer to L1 substate cap
  PCI: rockchip: Specify the link capability
  PCI: rockchip: Fix negotiated lanes calculation
  PCI: rockchip: Add Kconfig COMPILE_TEST
  PCI: rockchip: Mark RC as common clock architecture
  PCI: rockchip: Provide captured slot power limit and scale
  PCI: rockchip: Add three new resets as required properties
  PCI: Don't attempt to claim shadow copies of ROM
  PCI: designware: Check for iATU unroll support after initializing host
  PCI: qcom: Fix pp->dev usage before assignment
  PCI: designware-plat: Update author email address
  PCI: layerscape: Fix drvdata usage before assignment
  PCI: designware-plat: Change maintainer to Jose Abreu
---

44b83b32e7c8d6fcd6a7e877ce3db65f6afdf87c
diff --cc drivers/pci/host/pci-layerscape.c
index ca48ceb,6537079..ea78913
--- a/drivers/pci/host/pci-layerscape.c
+++ b/drivers/pci/host/pci-layerscape.c
@@@ -259,10 -252,11 +260,9 @@@ static int __init ls_pcie_probe(struct 
  
  	dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  	pcie->pp.dbi_base = devm_ioremap_resource(dev, dbi_base);
 -	if (IS_ERR(pcie->pp.dbi_base)) {
 -		dev_err(dev, "missing *regs* space\n");
 +	if (IS_ERR(pcie->pp.dbi_base))
  		return PTR_ERR(pcie->pp.dbi_base);
 -	}
  
- 	pcie->drvdata = match->data;
  	pcie->lut = pcie->pp.dbi_base + pcie->drvdata->lut_offset;
  
  	if (!ls_pcie_is_bridge(pcie))