From: Dylan McKay <me@dylanmckay.io>
Date: Sun, 9 Jul 2017 16:36:35 +0000 (+0000)
Subject: [AVR] Fix test errors due to tied operands not matching
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=448c56e2a50d55bceb0ba76f6e47158f9e23bdf2;p=platform%2Fupstream%2Fllvm.git

[AVR] Fix test errors due to tied operands not matching

Broken due to r307259.

llvm-svn: 307503
---

diff --git a/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir
index bcea4e6..4d58c85 100644
--- a/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir
@@ -17,8 +17,8 @@ body: |
 
     ; CHECK-LABEL: test_andiwrdrr
 
-    ; CHECK:      %r20 = ANDIRdK %r20, 175, implicit-def dead %sreg
-    ; CHECK-NEXT: %r21 = ANDIRdK %r21, 250, implicit-def %sreg
+    ; CHECK:      %r16 = ANDIRdK %r16, 175, implicit-def dead %sreg
+    ; CHECK-NEXT: %r17 = ANDIRdK %r17, 250, implicit-def %sreg
 
-    %r21r20 = ANDIWRdK %r17r16, 64175, implicit-def %sreg
+    %r17r16 = ANDIWRdK %r17r16, 64175, implicit-def %sreg
 ...
diff --git a/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir b/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir
index 58ff7af..db68a40 100644
--- a/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir
@@ -20,5 +20,5 @@ body: |
     ; CHECK:      %r14 = COMRd %r14, implicit-def dead %sreg
     ; CHECK-NEXT: %r15 = COMRd %r15, implicit-def %sreg
 
-    %r15r14 = COMWRd %r9r8, implicit-def %sreg
+    %r15r14 = COMWRd %r15r14, implicit-def %sreg
 ...
diff --git a/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir
index d77a6ba..eaa1284 100644
--- a/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir
@@ -20,5 +20,5 @@ body: |
     ; CHECK:      %r20 = ORIRdK %r20, 175, implicit-def dead %sreg
     ; CHECK-NEXT: %r21 = ORIRdK %r21, 250, implicit-def %sreg
 
-    %r21r20 = ORIWRdK %r17r16, 64175, implicit-def %sreg
+    %r21r20 = ORIWRdK %r21r20, 64175, implicit-def %sreg
 ...
diff --git a/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir
index 644e610..a92f695 100644
--- a/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir
@@ -20,5 +20,5 @@ body: |
     ; CHECK:      %r20 = SBCIRdK %r20, 175, implicit-def %sreg, implicit killed %sreg
     ; CHECK-NEXT: %r21 = SBCIRdK %r21, 250, implicit-def %sreg, implicit killed %sreg
 
-    %r21r20 = SBCIWRdK %r17r16, 64175, implicit-def %sreg, implicit %sreg
+    %r21r20 = SBCIWRdK %r21r20, 64175, implicit-def %sreg, implicit %sreg
 ...
diff --git a/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir
index c7d88d7..38ff880 100644
--- a/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir
+++ b/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir
@@ -20,5 +20,5 @@ body: |
     ; CHECK:      %r20 = SUBIRdK %r20, 175, implicit-def %sreg
     ; CHECK-NEXT: %r21 = SBCIRdK %r21, 250, implicit-def %sreg, implicit killed %sreg
 
-    %r21r20 = SUBIWRdK %r17r16, 64175, implicit-def %sreg
+    %r21r20 = SUBIWRdK %r21r20, 64175, implicit-def %sreg
 ...