From: sgjesse@chromium.org <sgjesse@chromium.org@ce2b1a6d-e550-0410-aec6-3dcde31c8c00>
Date: Wed, 9 Jun 2010 07:40:35 +0000 (+0000)
Subject: ARM: Fix bug in r4820 related to code for additional break positions.
X-Git-Tag: upstream/4.7.83~21662
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4446355c260ee98d33024ccef7639524ab25d9ac;p=platform%2Fupstream%2Fv8.git

ARM: Fix bug in r4820 related to code for additional break positions.

These issues where unly revealed in debug mode
Review URL: http://codereview.chromium.org/2733006

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4827 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
---

diff --git a/src/arm/assembler-arm-inl.h b/src/arm/assembler-arm-inl.h
index d26f0e3..8ca9126 100644
--- a/src/arm/assembler-arm-inl.h
+++ b/src/arm/assembler-arm-inl.h
@@ -116,9 +116,10 @@ Address* RelocInfo::target_reference_address() {
 
 
 Address RelocInfo::call_address() {
-  ASSERT(IsPatchedReturnSequence());
-  // The 2 instructions offset assumes patched return sequence.
-  ASSERT(IsJSReturn(rmode()));
+  // The 2 instructions offset assumes patched debug break slot or return
+  // sequence.
+  ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
+         (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
   return Memory::Address_at(pc_ + 2 * Assembler::kInstrSize);
 }
 
diff --git a/src/arm/debug-arm.cc b/src/arm/debug-arm.cc
index 74fd05b..65f5eea 100644
--- a/src/arm/debug-arm.cc
+++ b/src/arm/debug-arm.cc
@@ -263,7 +263,9 @@ void Debug::GenerateStubNoRegistersDebugBreak(MacroAssembler* masm) {
 
 
 void Debug::GenerateSlot(MacroAssembler* masm) {
-  // Generate enough nop's to make space for a call instruction.
+  // Generate enough nop's to make space for a call instruction. Avoid emitting
+  // the constant pool in the debug break slot code.
+  Assembler::BlockConstPoolScope block_const_pool(masm);
   Label check_codesize;
   __ bind(&check_codesize);
   __ RecordDebugBreakSlot();