From: Boyuan Zhang Date: Wed, 18 Jul 2018 20:24:18 +0000 (-0400) Subject: drm/amdgpu: add system interrupt mask for jrbc X-Git-Tag: v5.15~7648^2~27^2~349 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=44287b7190f4504792e8bbfcd0ef899d566e4ec7;p=platform%2Fkernel%2Flinux-starfive.git drm/amdgpu: add system interrupt mask for jrbc Add new mask for enabling system interrupt for jrbc. Signed-off-by: Boyuan Zhang Acked-by: Leo Liu Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h index d6ba269..124383d 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h +++ b/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h @@ -982,6 +982,8 @@ #define UVD_MASTINT_EN__VCPU_EN_MASK 0x00000002L #define UVD_MASTINT_EN__SYS_EN_MASK 0x00000004L #define UVD_MASTINT_EN__INT_OVERRUN_MASK 0x007FFFF0L +//UVD_SYS_INT_EN +#define UVD_SYS_INT_EN__UVD_JRBC_EN_MASK 0x00000010L //JPEG_CGC_CTRL #define JPEG_CGC_CTRL__DYN_CLOCK_MODE__SHIFT 0x0 #define JPEG_CGC_CTRL__JPEG2_MODE__SHIFT 0x1