From: Joel Jones <joel_k_jones@apple.com>
Date: Sun, 10 Feb 2013 23:56:30 +0000 (+0000)
Subject: Spelling correction
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=440d8e48ae7afe1231e93c0ac7dc67f328f3a1c1;p=platform%2Fupstream%2Fllvm.git

Spelling correction

llvm-svn: 174852
---

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 071b432..ff28dc17 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2691,7 +2691,7 @@ static bool findEXTRHalf(SDValue N, SDValue &Src, uint32_t &ShiftAmount,
   return true;
 }
 
-/// EXTR instruciton extracts a contiguous chunk of bits from two existing
+/// EXTR instruction extracts a contiguous chunk of bits from two existing
 /// registers viewed as a high/low pair. This function looks for the pattern:
 /// (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) and replaces it with an
 /// EXTR. Can't quite be done in TableGen because the two immediates aren't