From: Jiaxun Yang Date: Sat, 8 Aug 2020 12:32:27 +0000 (+0800) Subject: MIPS: Loongson64: Do not override watch and ejtag feature X-Git-Tag: v5.15~2852^2~13 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=433c1ca0d441ee0b88fdd83c84ee6d6d43080dcd;p=platform%2Fkernel%2Flinux-starfive.git MIPS: Loongson64: Do not override watch and ejtag feature Do not override ejtag feature to 0 as Loongson 3A1000+ do have ejtag. For watch, as KVM emulated CPU doesn't have watch feature, we should not enable it unconditionally. Signed-off-by: Jiaxun Yang Reviewed-by: Huacai Chen Signed-off-by: Thomas Bogendoerfer --- diff --git a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h index b6e9c99..eb18122 100644 --- a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h @@ -26,7 +26,6 @@ #define cpu_has_counter 1 #define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) #define cpu_has_divec 0 -#define cpu_has_ejtag 0 #define cpu_has_inclusive_pcaches 1 #define cpu_has_llsc 1 #define cpu_has_mcheck 0 @@ -42,7 +41,6 @@ #define cpu_has_veic 0 #define cpu_has_vint 0 #define cpu_has_vtag_icache 0 -#define cpu_has_watch 1 #define cpu_has_wsbh 1 #define cpu_has_ic_fills_f_dc 1 #define cpu_hwrena_impl_bits 0xc0000000