From: Baruch Siach Date: Wed, 27 Oct 2010 07:03:52 +0000 (-0300) Subject: [media] mx2_camera: fix pixel clock polarity configuration X-Git-Tag: accepted/tizen/common/20141203.182822~9333^2~21 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=42cc37fe20cc680fb58fe12ae5ba718d683b8ca2;p=platform%2Fkernel%2Flinux-arm64.git [media] mx2_camera: fix pixel clock polarity configuration When SOCAM_PCLK_SAMPLE_FALLING, just leave CSICR1_REDGE unset, otherwise we get the inverted behaviour. Signed-off-by: Baruch Siach Signed-off-by: Guennadi Liakhovetski Signed-off-by: Mauro Carvalho Chehab --- diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c index 072bd2d..13565cb 100644 --- a/drivers/media/video/mx2_camera.c +++ b/drivers/media/video/mx2_camera.c @@ -807,8 +807,6 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd, if (common_flags & SOCAM_PCLK_SAMPLE_RISING) csicr1 |= CSICR1_REDGE; - if (common_flags & SOCAM_PCLK_SAMPLE_FALLING) - csicr1 |= CSICR1_INV_PCLK; if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH) csicr1 |= CSICR1_SOF_POL; if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)