From: Maciej W. Rozycki Date: Sun, 11 Jun 2023 17:19:27 +0000 (+0100) Subject: PCI: Initialize dev->link_active_reporting earlier X-Git-Tag: v6.6.17~4503^2~15^2~13 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=42adbdc74c9a62ad3587be4d8a18941711023673;p=platform%2Fkernel%2Flinux-rpi.git PCI: Initialize dev->link_active_reporting earlier Determine whether Data Link Layer Link Active Reporting is available before calling any fixups so that the cached value can be used there and later on. [bhelgaas: move to set_pcie_port_type() where other PCIe init is done] Link: https://lore.kernel.org/r/alpine.DEB.2.21.2305310122210.59226@angie.orcam.me.uk Signed-off-by: Maciej W. Rozycki Signed-off-by: Bjorn Helgaas --- diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 0b2826c4a832..782925bac64a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -820,7 +820,6 @@ static void pci_set_bus_speed(struct pci_bus *bus) pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap); bus->max_bus_speed = pcie_link_speed[linkcap & PCI_EXP_LNKCAP_SLS]; - bridge->link_active_reporting = !!(linkcap & PCI_EXP_LNKCAP_DLLLARC); pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta); pcie_update_link_speed(bus, linksta); @@ -1527,6 +1526,7 @@ void set_pcie_port_type(struct pci_dev *pdev) { int pos; u16 reg16; + u32 reg32; int type; struct pci_dev *parent; @@ -1540,6 +1540,10 @@ void set_pcie_port_type(struct pci_dev *pdev) pci_read_config_dword(pdev, pos + PCI_EXP_DEVCAP, &pdev->devcap); pdev->pcie_mpss = FIELD_GET(PCI_EXP_DEVCAP_PAYLOAD, pdev->devcap); + pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, ®32); + if (reg32 & PCI_EXP_LNKCAP_DLLLARC) + pdev->link_active_reporting = 1; + parent = pci_upstream_bridge(pdev); if (!parent) return;