From: Nico Weber Date: Mon, 4 Nov 2019 14:51:41 +0000 (-0500) Subject: gn build: (manually) merge 51b4b17eb X-Git-Tag: llvmorg-11-init~5087 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4168a2e9de35f84abb90fecd03f06a8e131c50fc;p=platform%2Fupstream%2Fllvm.git gn build: (manually) merge 51b4b17eb Also reverts r353980 since that duplicated the GenAsmMatcher target for AArch64. Instead use visiblity. --- diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn index 54a12d2..588ac6f 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn @@ -1,7 +1,10 @@ import("//llvm/utils/TableGen/tablegen.gni") tablegen("AArch64GenAsmMatcher") { - visibility = [ ":AsmParser" ] + visibility = [ + ":AsmParser", + "//llvm/lib/Target/AArch64:LLVMAArch64CodeGen", + ] args = [ "-gen-asm-matcher" ] td_file = "../AArch64.td" } diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn index e6b6943..57759a2 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn @@ -1,11 +1,5 @@ import("//llvm/utils/TableGen/tablegen.gni") -tablegen("AArch64GenAsmMatcher") { - visibility = [ ":LLVMAArch64CodeGen" ] - args = [ "-gen-asm-matcher" ] - td_file = "AArch64.td" -} - tablegen("AArch64GenCallingConv") { visibility = [ ":LLVMAArch64CodeGen" ] args = [ "-gen-callingconv" ] @@ -53,7 +47,6 @@ tablegen("AArch64GenRegisterBank") { static_library("LLVMAArch64CodeGen") { deps = [ - ":AArch64GenAsmMatcher", ":AArch64GenCallingConv", ":AArch64GenDAGISel", ":AArch64GenFastISel", @@ -61,7 +54,9 @@ static_library("LLVMAArch64CodeGen") { ":AArch64GenGlobalISel", ":AArch64GenMCPseudoLowering", ":AArch64GenRegisterBank", - "AsmParser", + + # See https://reviews.llvm.org/D69130 + "AsmParser:AArch64GenAsmMatcher", "MCTargetDesc", "TargetInfo", "Utils", diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn index ef28b23a..fd664ac 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn @@ -1,7 +1,10 @@ import("//llvm/utils/TableGen/tablegen.gni") tablegen("RISCVGenAsmMatcher") { - visibility = [ ":AsmParser" ] + visibility = [ + ":AsmParser", + "//llvm/lib/Target/RISCV:LLVMRISCVCodeGen", + ] args = [ "-gen-asm-matcher" ] td_file = "../RISCV.td" } diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn index 6fd9073..963d5bb 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn @@ -45,7 +45,9 @@ static_library("LLVMRISCVCodeGen") { ":RISCVGenGlobalISel", ":RISCVGenMCPseudoLowering", ":RISCVGenRegisterBank", - "AsmParser", + + # See https://reviews.llvm.org/D69130 + "AsmParser:RISCVGenAsmMatcher", "MCTargetDesc", "TargetInfo", "Utils",