From: Cassie Jones <code@witchoflight.com>
Date: Wed, 27 Jan 2021 09:36:12 +0000 (-0500)
Subject: [AArch64][GlobalISel] Make G_SADDE and G_SSUBE legal
X-Git-Tag: llvmorg-14-init~16834
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=40f6599c20aff2ca4ee142f7923c6b40c6b9694d;p=platform%2Fupstream%2Fllvm.git

[AArch64][GlobalISel] Make G_SADDE and G_SSUBE legal

This makes G_SADDE and G_SSUBE legal in preparation for further work
legalizing overflowing operations. It's fine that they don't have an
instruction selector implementation yet, because G_UADDE and G_USUBE are
already legal on AArch64 without an instruction selector implementation. This
completes the set of G_[SU]{ADD,SUB}[EO] operations on AArch64.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D95325
---

diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 5a6c904..ed6ccb6 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -166,7 +166,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
   getActionDefinitionsBuilder({G_SMULH, G_UMULH}).legalFor({s32, s64});
 
   getActionDefinitionsBuilder(
-      {G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO, G_USUBO})
+      {G_SADDE, G_SSUBE, G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO, G_USUBO})
       .legalFor({{s32, s1}, {s64, s1}})
       .minScalar(0, s32);
 
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
new file mode 100644
index 0000000..2540aaa
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir
@@ -0,0 +1,26 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -verify-machineinstrs -run-pass=legalizer -debugify-and-strip-all-safe %s -o - | FileCheck %s
+
+---
+name:            test_scalar_sadde_32
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_scalar_sadde_32
+    ; CHECK: %lhs:_(s32) = COPY $w0
+    ; CHECK: %rhs:_(s32) = COPY $w1
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w2
+    ; CHECK: %carry_in:_(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: %add:_(s32), %carry_out:_(s1) = G_SADDE %lhs, %rhs, %carry_in
+    ; CHECK: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
+    ; CHECK: $w0 = COPY %add(s32)
+    ; CHECK: $w1 = COPY %carry_out_ext(s32)
+    %lhs:_(s32) = COPY $w0
+    %rhs:_(s32) = COPY $w1
+    %2:_(s32) = COPY $w2
+    %carry_in:_(s1) = G_TRUNC %2
+    %add:_(s32), %carry_out:_(s1) = G_SADDE %lhs, %rhs, %carry_in
+    %carry_out_ext:_(s32) = G_ANYEXT %carry_out
+    $w0 = COPY %add
+    $w1 = COPY %carry_out_ext
+
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
new file mode 100644
index 0000000..1c66749
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir
@@ -0,0 +1,26 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -verify-machineinstrs -run-pass=legalizer -debugify-and-strip-all-safe %s -o - | FileCheck %s
+
+---
+name:            test_scalar_ssube_32
+body:             |
+  bb.0.entry:
+    ; CHECK-LABEL: name: test_scalar_ssube_32
+    ; CHECK: %lhs:_(s32) = COPY $w0
+    ; CHECK: %rhs:_(s32) = COPY $w1
+    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w2
+    ; CHECK: %carry_in:_(s1) = G_TRUNC [[COPY]](s32)
+    ; CHECK: %sub:_(s32), %carry_out:_(s1) = G_SSUBE %lhs, %rhs, %carry_in
+    ; CHECK: %carry_out_ext:_(s32) = G_ANYEXT %carry_out(s1)
+    ; CHECK: $w0 = COPY %sub(s32)
+    ; CHECK: $w1 = COPY %carry_out_ext(s32)
+    %lhs:_(s32) = COPY $w0
+    %rhs:_(s32) = COPY $w1
+    %2:_(s32) = COPY $w2
+    %carry_in:_(s1) = G_TRUNC %2
+    %sub:_(s32), %carry_out:_(s1) = G_SSUBE %lhs, %rhs, %carry_in
+    %carry_out_ext:_(s32) = G_ANYEXT %carry_out
+    $w0 = COPY %sub
+    $w1 = COPY %carry_out_ext
+
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index 6c1af11..ffd47e0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -297,6 +297,7 @@
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_UADDE (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_USUBO (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
@@ -312,15 +313,16 @@
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_SADDE (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. the first uncovered type index: 2, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_SSUBO (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_SSUBE (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. the first uncovered type index: 2, OK
+# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_UMULO (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 2, OK