From: H.J. Lu <hjl.tools@gmail.com>
Date: Mon, 7 Apr 2008 13:07:16 +0000 (+0000)
Subject: gas/
X-Git-Tag: sid-snapshot-20080501~272
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=40f12533831101e95be7921d126e66f038222b17;p=platform%2Fupstream%2Fbinutils.git

gas/

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (parse_real_register): Return AVX register
	only if AVX is enabled.

gas/testsuite/

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/att-regs.s: Add AVX register test.
	* gas/i386/intel-regs.s: Likewise.

	* gas/i386/att-regs.d: Updated.
	* gas/i386/intel-regs.d: Likewise.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c308c82..3ea6ff1 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (parse_real_register): Return AVX register
+	only if AVX is enabled.
+
 2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
 	PR gas/6043
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 4426697..f6b3909 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7685,6 +7685,9 @@ parse_real_register (char *reg_string, char **end_op)
   if (r->reg_type.bitfield.regxmm && !cpu_arch_flags.bitfield.cpusse)
     return (const reg_entry *) NULL;
 
+  if (r->reg_type.bitfield.regymm && !cpu_arch_flags.bitfield.cpuavx)
+    return (const reg_entry *) NULL;
+
   /* Don't allow fake index register unless allow_index_reg isn't 0. */
   if (!allow_index_reg
       && (r->reg_num == RegEiz || r->reg_num == RegRiz))
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 65c19a3..89280cc 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/att-regs.s: Add AVX register test.
+	* gas/i386/intel-regs.s: Likewise.
+
+	* gas/i386/att-regs.d: Updated.
+	* gas/i386/intel-regs.d: Likewise.
+
 2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
 	PR gas/6043
diff --git a/gas/testsuite/gas/i386/att-regs.d b/gas/testsuite/gas/i386/att-regs.d
index 6ab9d28..384e789 100644
--- a/gas/testsuite/gas/i386/att-regs.d
+++ b/gas/testsuite/gas/i386/att-regs.d
@@ -34,6 +34,7 @@ Disassembly of section \.text:
 .*:[ 	]+dd c0[ 	]+ffree[ 	]+%st(\(0\))?
 .*:[ 	]+0f ef c0[ 	]+pxor[ 	]+%mm0,%mm0
 .*:[ 	]+0f 57 c0[ 	]+xorps[ 	]+%xmm0,%xmm0
+.*:[ 	]+c5 fc 57 c0[ 	]+vxorps[ 	]+%ymm0,%ymm0,%ymm0
 .*:[ 	]+44[ 	]+inc    %esp
 .*:[ 	]+88 c0[ 	]+mov[ 	]+%al,%al
 .*:[ 	]+66 44[ 	]+inc[ 	]+%sp
diff --git a/gas/testsuite/gas/i386/att-regs.s b/gas/testsuite/gas/i386/att-regs.s
index b966509..f58deec 100644
--- a/gas/testsuite/gas/i386/att-regs.s
+++ b/gas/testsuite/gas/i386/att-regs.s
@@ -42,6 +42,9 @@
 	.arch .sse
 	xorps	xmm0, xmm0
 
+	.arch .avx
+	vxorps	ymm0, ymm0, ymm0
+
 	.arch generic64
 	.code64
 	mov	r8b, axl
diff --git a/gas/testsuite/gas/i386/intel-regs.d b/gas/testsuite/gas/i386/intel-regs.d
index cf52161..0ecc9f6 100644
--- a/gas/testsuite/gas/i386/intel-regs.d
+++ b/gas/testsuite/gas/i386/intel-regs.d
@@ -34,6 +34,7 @@ Disassembly of section \.text:
 .*:[ 	]+dd c0[ 	]+ffree[ 	]+%st(\(0\))?
 .*:[ 	]+0f ef c0[ 	]+pxor[ 	]+%mm0,%mm0
 .*:[ 	]+0f 57 c0[ 	]+xorps[ 	]+%xmm0,%xmm0
+.*:[ 	]+c5 fc 57 c0[ 	]+vxorps[ 	]+%ymm0,%ymm0,%ymm0
 .*:[ 	]+44[ 	]+inc    %esp
 .*:[ 	]+88 c0[ 	]+mov[ 	]+%al,%al
 .*:[ 	]+66 44[ 	]+inc[ 	]+%sp
diff --git a/gas/testsuite/gas/i386/intel-regs.s b/gas/testsuite/gas/i386/intel-regs.s
index df5baf2..546e196 100644
--- a/gas/testsuite/gas/i386/intel-regs.s
+++ b/gas/testsuite/gas/i386/intel-regs.s
@@ -42,6 +42,9 @@
 	.arch .sse
 	xorps	xmm0, xmm0
 
+	.arch .avx
+	vxorps	ymm0, ymm0, ymm0
+
 	.arch generic64
 	.code64
 	mov	axl, r8b