From: Jongpill Lee <boyko.lee@samsung.com>
Date: Wed, 22 Jun 2011 08:50:25 +0000 (+0900)
Subject: tty: s5pv210: Add delay loop on fifo reset function for UART
X-Git-Tag: upstream/snapshot3+hdmi~9541^2~11
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=40eb0de5ba7e88e30349f336a38cf22016b8c07f;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git

tty: s5pv210: Add delay loop on fifo reset function for UART

This patch addes delay loop on fifo reset function for UART.
On high speed freq, it needs delay function when fifo reset.
If not, system will hang by this uart reset problem when resuming
from suspend mode.

Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---

diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index fb2619f..dce6cb3 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -18,6 +18,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 #include <linux/serial.h>
+#include <linux/delay.h>
 
 #include <asm/irq.h>
 #include <mach/hardware.h>
@@ -83,6 +84,9 @@ static int s5pv210_serial_resetport(struct uart_port *port,
 	wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
 	wr_regl(port, S3C2410_UFCON, cfg->ufcon);
 
+	/* It is need to delay When reset FIFO register */
+	udelay(1);
+
 	return 0;
 }