From: Jernej Skrabec Date: Sun, 30 Jan 2022 14:27:14 +0000 (+0100) Subject: sunxi: clock: H6/H616: Add resistor calibration X-Git-Tag: v2022.07~123^2~4 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=40a9c200aff1b855f66745a1b9961668739ef6fb;p=platform%2Fkernel%2Fu-boot.git sunxi: clock: H6/H616: Add resistor calibration BSP boot0 executes resistor calibration before clocks are initialized. Let's do that. Signed-off-by: Jernej Skrabec Signed-off-by: Andre Przywara --- diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c index e5846e6..32119ad 100644 --- a/arch/arm/mach-sunxi/clock_sun50i_h6.c +++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c @@ -12,9 +12,14 @@ void clock_init_safe(void) struct sunxi_prcm_reg *const prcm = (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; - /* this seems to enable PLLs on H616 */ - if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) { + /* this seems to enable PLLs on H616 */ setbits_le32(&prcm->sys_pwroff_gating, 0x10); + setbits_le32(&prcm->res_cal_ctrl, 2); + } + + clrbits_le32(&prcm->res_cal_ctrl, 1); + setbits_le32(&prcm->res_cal_ctrl, 1); clock_set_pll1(408000000);