From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Thu, 10 Aug 2023 20:35:43 +0000 (-0400)
Subject: agx: Lower f2f16_rtz
X-Git-Tag: upstream/23.3.3~3435
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=4002ba95bbc7599934b4381ea1bb636b08b3c428;p=platform%2Fupstream%2Fmesa.git

agx: Lower f2f16_rtz

Based on what VIR does.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>
---

diff --git a/src/asahi/compiler/agx_nir_algebraic.py b/src/asahi/compiler/agx_nir_algebraic.py
index 9fd4a40..6d05d4e 100644
--- a/src/asahi/compiler/agx_nir_algebraic.py
+++ b/src/asahi/compiler/agx_nir_algebraic.py
@@ -43,6 +43,11 @@ lower_pack = [
     (('f2u8', a), ('u2u8', ('f2u16', a))),
     (('f2i8', a), ('i2i8', ('f2i16', a))),
 
+    # Based on the VIR lowering
+    (('f2f16_rtz', 'a@32'),
+     ('bcsel', ('flt', ('fabs', a), ('fabs', ('f2f32', ('f2f16_rtne', a)))),
+      ('isub', ('f2f16_rtne', a), 1), ('f2f16_rtne', a))),
+
     # These are based on the lowerings from nir_opt_algebraic, but conditioned
     # on the number of bits not being constant. If the bit count is constant
     # (the happy path) we can use our native instruction instead.